From patchwork Fri Feb 1 06:05:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shiyou Yin X-Patchwork-Id: 11940 Return-Path: X-Original-To: patchwork@ffaux-bg.ffmpeg.org Delivered-To: patchwork@ffaux-bg.ffmpeg.org Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org [79.124.17.100]) by ffaux.localdomain (Postfix) with ESMTP id 3A68144C494 for ; Fri, 1 Feb 2019 08:13:17 +0200 (EET) Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 60DE168AC35; Fri, 1 Feb 2019 08:13:05 +0200 (EET) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 97B6C68AA90 for ; Fri, 1 Feb 2019 08:12:55 +0200 (EET) Received: from localhost (unknown [210.45.123.204]) by mail (Coremail) with SMTP id QMiowPBxOOWO4VNc43qAAA--.7867S3; Fri, 01 Feb 2019 14:05:02 +0800 (CST) From: Shiyou Yin To: ffmpeg-devel@ffmpeg.org Date: Fri, 1 Feb 2019 14:05:00 +0800 Message-Id: <1549001102-30526-2-git-send-email-yinshiyou-hf@loongson.cn> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1549001102-30526-1-git-send-email-yinshiyou-hf@loongson.cn> References: <1549001102-30526-1-git-send-email-yinshiyou-hf@loongson.cn> X-CM-TRANSID: QMiowPBxOOWO4VNc43qAAA--.7867S3 X-Coremail-Antispam: 1UD129KBjvJXoW3tF13tw1DWry8JF4UuryDKFg_yoWDXFyUpr ykGwsYv3WUtFsrur17tr1UGrnrArnrXr13GFZFgFyUXw1Yqr1xXr97Jry8GF1ag3WUWFy3 ZrnxZFyavw12kw7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUU9Cb7Iv0xC_Kw4lb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rw A2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_JFI_Gr1l84ACjcxK6xII jxv20xvEc7CjxVAFwI0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwV C2z280aVCY1x0267AKxVWxJr0_GcWle2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xv F2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_JF0_Jw1lYx0Ex4A2jsIE14v26r1j6r 4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwACjcxG0xvY0x0EwIxGrVCF 72vEw4AK0wCY02Avz4vE14v_GF1l42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr 0_Gr1l4IxYO2xFxVAFwI0_JF0_Jw1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8GjcxK 67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1j6r15MIIYrxkI7VAKI48JMIIF0xvE2Ix0cI 8IcVAFwI0_JFI_Gr1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE42xK8VAv wI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I0E14 v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07b2tCcUUUUU= X-CM-SenderInfo: p1lq2x5l1r3gtki6z05rqj20fqof0/ Subject: [FFmpeg-devel] [PATCH 2/4] avcodec/mips: [loongson] optimize put_hevc_epel_bi_hv_8 with mmi. X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches MIME-Version: 1.0 Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" Optimize put_hevc_epel_bi_hv_8 with mmi in the case width=4/8/12/16/24/32. This optimization improved HEVC decoding performance 1.7%(2.30x to 2.34x, tested on loongson 3A3000). --- libavcodec/mips/hevcdsp_init_mips.c | 7 ++ libavcodec/mips/hevcdsp_mips.h | 6 ++ libavcodec/mips/hevcdsp_mmi.c | 186 ++++++++++++++++++++++++++++++++++++ 3 files changed, 199 insertions(+) diff --git a/libavcodec/mips/hevcdsp_init_mips.c b/libavcodec/mips/hevcdsp_init_mips.c index 9e08c0e..bf7d823 100644 --- a/libavcodec/mips/hevcdsp_init_mips.c +++ b/libavcodec/mips/hevcdsp_init_mips.c @@ -55,6 +55,13 @@ static av_cold void hevc_dsp_init_mmi(HEVCDSPContext *c, c->put_hevc_epel_bi[6][0][0] = ff_hevc_put_hevc_pel_bi_pixels24_8_mmi; c->put_hevc_epel_bi[7][0][0] = ff_hevc_put_hevc_pel_bi_pixels32_8_mmi; + c->put_hevc_epel_bi[1][1][1] = ff_hevc_put_hevc_epel_bi_hv4_8_mmi; + c->put_hevc_epel_bi[3][1][1] = ff_hevc_put_hevc_epel_bi_hv8_8_mmi; + c->put_hevc_epel_bi[4][1][1] = ff_hevc_put_hevc_epel_bi_hv12_8_mmi; + c->put_hevc_epel_bi[5][1][1] = ff_hevc_put_hevc_epel_bi_hv16_8_mmi; + c->put_hevc_epel_bi[6][1][1] = ff_hevc_put_hevc_epel_bi_hv24_8_mmi; + c->put_hevc_epel_bi[7][1][1] = ff_hevc_put_hevc_epel_bi_hv32_8_mmi; + c->put_hevc_qpel_uni[1][1][1] = ff_hevc_put_hevc_qpel_uni_hv4_8_mmi; c->put_hevc_qpel_uni[3][1][1] = ff_hevc_put_hevc_qpel_uni_hv8_8_mmi; c->put_hevc_qpel_uni[4][1][1] = ff_hevc_put_hevc_qpel_uni_hv12_8_mmi; diff --git a/libavcodec/mips/hevcdsp_mips.h b/libavcodec/mips/hevcdsp_mips.h index ebd5f32..fe4faae 100644 --- a/libavcodec/mips/hevcdsp_mips.h +++ b/libavcodec/mips/hevcdsp_mips.h @@ -524,6 +524,12 @@ L_BI_MC(qpel, hv, 32, mmi); L_BI_MC(qpel, hv, 48, mmi); L_BI_MC(qpel, hv, 64, mmi); +L_BI_MC(epel, hv, 4, mmi); +L_BI_MC(epel, hv, 8, mmi); +L_BI_MC(epel, hv, 12, mmi); +L_BI_MC(epel, hv, 16, mmi); +L_BI_MC(epel, hv, 24, mmi); +L_BI_MC(epel, hv, 32, mmi); #undef L_BI_MC #define L_UNI_MC(PEL, DIR, WIDTH, TYPE) \ diff --git a/libavcodec/mips/hevcdsp_mmi.c b/libavcodec/mips/hevcdsp_mmi.c index aced846..f0e4aa9 100644 --- a/libavcodec/mips/hevcdsp_mmi.c +++ b/libavcodec/mips/hevcdsp_mmi.c @@ -446,6 +446,192 @@ PUT_HEVC_QPEL_BI_HV(32, 8, -32, -64, -32); PUT_HEVC_QPEL_BI_HV(48, 12, -48, -96, -48); PUT_HEVC_QPEL_BI_HV(64, 16, -64, -128, -64); +#define PUT_HEVC_EPEL_BI_HV(w, x_step, src_step, src2_step, dst_step) \ +void ff_hevc_put_hevc_epel_bi_hv##w##_8_mmi(uint8_t *_dst, \ + ptrdiff_t _dststride, \ + uint8_t *_src, \ + ptrdiff_t _srcstride, \ + int16_t *src2, int height, \ + intptr_t mx, intptr_t my, \ + int width) \ +{ \ + int x, y; \ + pixel *src = (pixel *)_src; \ + ptrdiff_t srcstride = _srcstride / sizeof(pixel); \ + pixel *dst = (pixel *)_dst; \ + ptrdiff_t dststride = _dststride / sizeof(pixel); \ + const int8_t *filter = ff_hevc_epel_filters[mx - 1]; \ + int16_t tmp_array[(MAX_PB_SIZE + EPEL_EXTRA) * MAX_PB_SIZE]; \ + int16_t *tmp = tmp_array; \ + uint64_t ftmp[12]; \ + uint64_t rtmp[1]; \ + int shift = 7; \ + int offset = 64; \ + \ + src -= (EPEL_EXTRA_BEFORE * srcstride + 1); \ + x = width >> 2; \ + y = height + EPEL_EXTRA; \ + __asm__ volatile( \ + MMI_LWC1(%[ftmp1], %[filter], 0x00) \ + "li %[rtmp0], 0x08 \n\t" \ + "dmtc1 %[rtmp0], %[ftmp0] \n\t" \ + "punpcklbh %[ftmp1], %[ftmp0], %[ftmp1] \n\t" \ + "psrah %[ftmp1], %[ftmp1], %[ftmp0] \n\t" \ + "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" \ + \ + "1: \n\t" \ + "2: \n\t" \ + "gslwlc1 %[ftmp2], 0x03(%[src]) \n\t" \ + "gslwrc1 %[ftmp2], 0x00(%[src]) \n\t" \ + "gslwlc1 %[ftmp3], 0x04(%[src]) \n\t" \ + "gslwrc1 %[ftmp3], 0x01(%[src]) \n\t" \ + "gslwlc1 %[ftmp4], 0x05(%[src]) \n\t" \ + "gslwrc1 %[ftmp4], 0x02(%[src]) \n\t" \ + "gslwlc1 %[ftmp5], 0x06(%[src]) \n\t" \ + "gslwrc1 %[ftmp5], 0x03(%[src]) \n\t" \ + "punpcklbh %[ftmp2], %[ftmp2], %[ftmp0] \n\t" \ + "pmullh %[ftmp2], %[ftmp2], %[ftmp1] \n\t" \ + "punpcklbh %[ftmp3], %[ftmp3], %[ftmp0] \n\t" \ + "pmullh %[ftmp3], %[ftmp3], %[ftmp1] \n\t" \ + "punpcklbh %[ftmp4], %[ftmp4], %[ftmp0] \n\t" \ + "pmullh %[ftmp4], %[ftmp4], %[ftmp1] \n\t" \ + "punpcklbh %[ftmp5], %[ftmp5], %[ftmp0] \n\t" \ + "pmullh %[ftmp5], %[ftmp5], %[ftmp1] \n\t" \ + TRANSPOSE_4H(%[ftmp2], %[ftmp3], %[ftmp4], %[ftmp5], \ + %[ftmp6], %[ftmp7], %[ftmp8], %[ftmp9]) \ + "paddh %[ftmp2], %[ftmp2], %[ftmp3] \n\t" \ + "paddh %[ftmp4], %[ftmp4], %[ftmp5] \n\t" \ + "paddh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" \ + "gssdlc1 %[ftmp2], 0x07(%[tmp]) \n\t" \ + "gssdrc1 %[ftmp2], 0x00(%[tmp]) \n\t" \ + \ + "daddi %[x], %[x], -0x01 \n\t" \ + PTR_ADDIU "%[src], %[src], 0x04 \n\t" \ + PTR_ADDIU "%[tmp], %[tmp], 0x08 \n\t" \ + "bnez %[x], 2b \n\t" \ + \ + "daddi %[y], %[y], -0x01 \n\t" \ + "li %[x], " #x_step " \n\t" \ + PTR_ADDIU "%[src], %[src], " #src_step " \n\t" \ + PTR_ADDIU "%[tmp], %[tmp], " #src2_step " \n\t" \ + PTR_ADDU "%[src], %[src], %[stride] \n\t" \ + PTR_ADDIU "%[tmp], %[tmp], 0x80 \n\t" \ + "bnez %[y], 1b \n\t" \ + : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), \ + [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), \ + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), \ + [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), \ + [ftmp8]"=&f"(ftmp[8]), [ftmp9]"=&f"(ftmp[9]), \ + [rtmp0]"=&r"(rtmp[0]), \ + [src]"+&r"(src), [tmp]"+&r"(tmp), [y]"+&r"(y), \ + [x]"+&r"(x) \ + : [filter]"r"(filter), [stride]"r"(srcstride) \ + : "memory" \ + ); \ + \ + tmp = tmp_array; \ + filter = ff_hevc_epel_filters[my - 1]; \ + x = width >> 2; \ + y = height; \ + __asm__ volatile( \ + MMI_LWC1(%[ftmp1], %[filter], 0x00) \ + "li %[rtmp0], 0x08 \n\t" \ + "dmtc1 %[rtmp0], %[ftmp0] \n\t" \ + "punpcklbh %[ftmp1], %[ftmp0], %[ftmp1] \n\t" \ + "psrah %[ftmp1], %[ftmp1], %[ftmp0] \n\t" \ + "li %[rtmp0], 0x06 \n\t" \ + "dmtc1 %[rtmp0], %[ftmp0] \n\t" \ + "punpcklwd %[offset], %[offset], %[offset] \n\t" \ + "xor %[ftmp2], %[ftmp2], %[ftmp2] \n\t" \ + \ + "1: \n\t" \ + "li %[x], " #x_step " \n\t" \ + "2: \n\t" \ + "gsldlc1 %[ftmp3], 0x07(%[tmp]) \n\t" \ + "gsldrc1 %[ftmp3], 0x00(%[tmp]) \n\t" \ + PTR_ADDIU "%[tmp], %[tmp], 0x80 \n\t" \ + "gsldlc1 %[ftmp4], 0x07(%[tmp]) \n\t" \ + "gsldrc1 %[ftmp4], 0x00(%[tmp]) \n\t" \ + PTR_ADDIU "%[tmp], %[tmp], 0x80 \n\t" \ + "gsldlc1 %[ftmp5], 0x07(%[tmp]) \n\t" \ + "gsldrc1 %[ftmp5], 0x00(%[tmp]) \n\t" \ + PTR_ADDIU "%[tmp], %[tmp], 0x80 \n\t" \ + "gsldlc1 %[ftmp6], 0x07(%[tmp]) \n\t" \ + "gsldrc1 %[ftmp6], 0x00(%[tmp]) \n\t" \ + PTR_ADDIU "%[tmp], %[tmp], -0x180 \n\t" \ + TRANSPOSE_4H(%[ftmp3], %[ftmp4], %[ftmp5], %[ftmp6], \ + %[ftmp7], %[ftmp8], %[ftmp9], %[ftmp10]) \ + "pmaddhw %[ftmp7], %[ftmp3], %[ftmp1] \n\t" \ + "pmaddhw %[ftmp8], %[ftmp4], %[ftmp1] \n\t" \ + TRANSPOSE_2W(%[ftmp7], %[ftmp8], %[ftmp3], %[ftmp4]) \ + "paddw %[ftmp3], %[ftmp3], %[ftmp4] \n\t" \ + "psraw %[ftmp3], %[ftmp3], %[ftmp0] \n\t" \ + "pmaddhw %[ftmp7], %[ftmp5], %[ftmp1] \n\t" \ + "pmaddhw %[ftmp8], %[ftmp6], %[ftmp1] \n\t" \ + TRANSPOSE_2W(%[ftmp7], %[ftmp8], %[ftmp5], %[ftmp6]) \ + "paddw %[ftmp5], %[ftmp5], %[ftmp6] \n\t" \ + "psraw %[ftmp5], %[ftmp5], %[ftmp0] \n\t" \ + "packsswh %[ftmp3], %[ftmp3], %[ftmp5] \n\t" \ + "gsldlc1 %[ftmp4], 0x07(%[src2]) \n\t" \ + "gsldrc1 %[ftmp4], 0x00(%[src2]) \n\t" \ + "li %[rtmp0], 0x10 \n\t" \ + "dmtc1 %[rtmp0], %[ftmp8] \n\t" \ + "punpcklhw %[ftmp5], %[ftmp2], %[ftmp3] \n\t" \ + "punpckhhw %[ftmp6], %[ftmp2], %[ftmp3] \n\t" \ + "punpckhhw %[ftmp3], %[ftmp2], %[ftmp4] \n\t" \ + "punpcklhw %[ftmp4], %[ftmp2], %[ftmp4] \n\t" \ + "psraw %[ftmp5], %[ftmp5], %[ftmp8] \n\t" \ + "psraw %[ftmp6], %[ftmp6], %[ftmp8] \n\t" \ + "psraw %[ftmp3], %[ftmp3], %[ftmp8] \n\t" \ + "psraw %[ftmp4], %[ftmp4], %[ftmp8] \n\t" \ + "paddw %[ftmp5], %[ftmp5], %[ftmp4] \n\t" \ + "paddw %[ftmp6], %[ftmp6], %[ftmp3] \n\t" \ + "paddw %[ftmp5], %[ftmp5], %[offset] \n\t" \ + "paddw %[ftmp6], %[ftmp6], %[offset] \n\t" \ + "psraw %[ftmp5], %[ftmp5], %[shift] \n\t" \ + "psraw %[ftmp6], %[ftmp6], %[shift] \n\t" \ + "packsswh %[ftmp5], %[ftmp5], %[ftmp6] \n\t" \ + "pcmpgth %[ftmp7], %[ftmp5], %[ftmp2] \n\t" \ + "and %[ftmp3], %[ftmp5], %[ftmp7] \n\t" \ + "packushb %[ftmp3], %[ftmp3], %[ftmp3] \n\t" \ + "gsswlc1 %[ftmp3], 0x03(%[dst]) \n\t" \ + "gsswrc1 %[ftmp3], 0x00(%[dst]) \n\t" \ + \ + "daddi %[x], %[x], -0x01 \n\t" \ + PTR_ADDIU "%[src2], %[src2], 0x08 \n\t" \ + PTR_ADDIU "%[tmp], %[tmp], 0x08 \n\t" \ + PTR_ADDIU "%[dst], %[dst], 0x04 \n\t" \ + "bnez %[x], 2b \n\t" \ + \ + "daddi %[y], %[y], -0x01 \n\t" \ + PTR_ADDIU "%[src2], %[src2], " #src2_step " \n\t" \ + PTR_ADDIU "%[tmp], %[tmp], " #src2_step " \n\t" \ + PTR_ADDIU "%[dst], %[dst], " #dst_step " \n\t" \ + PTR_ADDIU "%[src2], %[src2], 0x80 \n\t" \ + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" \ + PTR_ADDIU "%[tmp], %[tmp], 0x80 \n\t" \ + "bnez %[y], 1b \n\t" \ + : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), \ + [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), \ + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), \ + [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), \ + [ftmp8]"=&f"(ftmp[8]), [ftmp9]"=&f"(ftmp[9]), \ + [ftmp10]"=&f"(ftmp[10]), [src2]"+&r"(src2), \ + [dst]"+&r"(dst), [tmp]"+&r"(tmp), [y]"+&r"(y), [x]"=&r"(x), \ + [offset]"+&f"(offset), [rtmp0]"=&r"(rtmp[0]) \ + : [filter]"r"(filter), [stride]"r"(dststride), \ + [shift]"f"(shift) \ + : "memory" \ + ); \ +} + +PUT_HEVC_EPEL_BI_HV(4, 1, -4, -8, -4); +PUT_HEVC_EPEL_BI_HV(8, 2, -8, -16, -8); +PUT_HEVC_EPEL_BI_HV(12, 3, -12, -24, -12); +PUT_HEVC_EPEL_BI_HV(16, 4, -16, -32, -16); +PUT_HEVC_EPEL_BI_HV(24, 6, -24, -48, -24); +PUT_HEVC_EPEL_BI_HV(32, 8, -32, -64, -32); + #define PUT_HEVC_PEL_BI_PIXELS(w, x_step, src_step, dst_step, src2_step) \ void ff_hevc_put_hevc_pel_bi_pixels##w##_8_mmi(uint8_t *_dst, \ ptrdiff_t _dststride, \