From patchwork Thu Jun 1 08:37:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: shivraj.patil@imgtec.com X-Patchwork-Id: 3777 Delivered-To: ffmpegpatchwork@gmail.com Received: by 10.103.10.2 with SMTP id 2csp663127vsk; Thu, 1 Jun 2017 01:37:04 -0700 (PDT) X-Received: by 10.223.163.21 with SMTP id c21mr340064wrb.38.1496306224547; Thu, 01 Jun 2017 01:37:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1496306224; cv=none; d=google.com; s=arc-20160816; b=DrjDZMfjyFH7ioNjwnwTunBqnz+zPZO1fnmw0ZNE9gefKNaJc5FvdrtsPWFJt7dYsZ 6qQRo1Qi5IRuaCSJp16G6B5JtE/ISPVeogxbyhdYS82dDZc98RPezXn3wWAHQT3e5zaZ lTBCU6VHgyTNvEpXSKTJzGp8VuqOQ0XXe/LCtpPFTir+umAF3Awne2NAj7Z2wfk3vciA jSUqLaXcwWeBi7TGR/LXbZa1Z+L2pZsfHb40wyhLSFQ7MxGsp0HNwzkB45/UwB8k613J vMSMx9rEIHO6GLCyb2p3GtBqLXyfgoHYA/p7B/pG8a9Vwoj63UnGkiCwsyFeDEAoQJqn vHEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:reply-to :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:mime-version:message-id:date:to:from :delivered-to:arc-authentication-results; bh=CmplKPiHT8FlsQ+3sSLM3pZhDn04NJC96TxxHf6rRQ0=; b=GbMRZJaA9AnC0aAOGMPFkF4fiyrV89rq2lymKCiaf3glhi96G493jQIeEfirTqGEk9 0jZFaxAyCK13v9lF4cOpSGq9dkU0wmk+6LTAxAYbKvz5VYieaYa+gfF1FvtTGtjlTplQ fYAVz53FGFOEYiPUOOaxaWBBlRQ6qsD9J/7BKG9TGvYUOSL5UXjFtsOd1Ci7ih+SF86G mFWCOWGQ5eWMHE7kjxSR1LgyYo2hD+IvP1Agz77qtVYEboQAuP5LUXiWgwSV2aAVDsEs AFftHYjh054ZvNbec/XdI86d41dTFkPrWU0H7V68adAuDLWD92hb82mImAk6gjOG1hnG 5N0A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Return-Path: Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org. [79.124.17.100]) by mx.google.com with ESMTP id r124si12487341wma.5.2017.06.01.01.37.03; Thu, 01 Jun 2017 01:37:04 -0700 (PDT) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id D4E1C6898DC; Thu, 1 Jun 2017 11:36:55 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from mailapp01.imgtec.com (mailapp01.imgtec.com [195.59.15.196]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 3877068988A for ; Thu, 1 Jun 2017 11:36:49 +0300 (EEST) Received: from hhmail02.hh.imgtec.org (unknown [10.100.10.20]) by Forcepoint Email with ESMTPS id 2260E41CB6EF3; Thu, 1 Jun 2017 09:36:51 +0100 (IST) Received: from pudesk204.pu.imgtec.org (192.168.91.60) by hhmail02.hh.imgtec.org (10.100.10.20) with Microsoft SMTP Server (TLS) id 14.3.294.0; Thu, 1 Jun 2017 09:36:52 +0100 From: To: Date: Thu, 1 Jun 2017 14:07:19 +0530 Message-ID: <1496306239-17887-1-git-send-email-shivraj.patil@imgtec.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 X-Originating-IP: [192.168.91.60] Subject: [FFmpeg-devel] [PATCH] Disable MSA optimization for big endian arch X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Cc: rsbultje@gmail.com, michael@niedermayer.cc, Shivraj Patil Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" From: Shivraj Patil The current upstreamed code has been written and tested for Little Endian systems. We do have plans to add the Big Endian support in near future, but till that time, need to disable all to avoid its usage and failures. Signed-off-by: Shivraj Patil --- configure | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/configure b/configure index 40eb2bb..6af896b 100755 --- a/configure +++ b/configure @@ -5392,6 +5392,10 @@ elif enabled mips; then enabled mipsdsp && check_inline_asm_flags mipsdsp '"addu.qb $t0, $t1, $t2"' '-mdsp' enabled mipsdspr2 && check_inline_asm_flags mipsdspr2 '"absq_s.qb $t0, $t1"' '-mdspr2' + if enabled bigendian && enabled msa; then + disable msa + fi + elif enabled parisc; then if enabled gcc; then