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[79.124.17.100]) by mx.google.com with ESMTP id u4-v6si17696289wrc.278.2018.07.11.02.45.50; Wed, 11 Jul 2018 02:45:55 -0700 (PDT) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 5D4B568A64A; Wed, 11 Jul 2018 12:45:39 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 2E6D168A5A8 for ; Wed, 11 Jul 2018 12:45:29 +0300 (EEST) Received: from localhost (unknown [202.141.160.96]) by mail (Coremail) with SMTP id QMiowPDxz2Oe0EVbomqSAA--.24643S3; Wed, 11 Jul 2018 17:40:46 +0800 (CST) From: Shiyou Yin To: ffmpeg-devel@ffmpeg.org Date: Wed, 11 Jul 2018 17:45:34 +0800 Message-Id: <1531302334-15972-1-git-send-email-yinshiyou-hf@loongson.cn> X-Mailer: git-send-email 2.1.0 X-CM-TRANSID: QMiowPDxz2Oe0EVbomqSAA--.24643S3 X-Coremail-Antispam: 1UD129KBjvAXoWfAw47CFW7tr4xAFy8Kr48JFb_yoW5AF47Ao W5GrW8tasrJ3WxJr4kAr1UCw4FyFyUtrWUJr4fJw43Kryqqr18Cr4rCw45Jr4vqw43JrW3 AF1vqF17Za1UG3y8n29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUY87kC6x804xWl14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK 8VAvwI8IcIk0rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4 AK67xGY2AK021l84ACjcxK6xIIjxv20xvE14v26r4j6ryUM28EF7xvwVC0I7IYx2IY6xkF 7I0E14v26r4j6F4UM28EF7xvwVC2z280aVAFwI0_Cr1j6rxdM28EF7xvwVC2z280aVCY1x 0267AKxVW0oVCq3wAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG 6I80ewAv7VC0I7IYx2IY67AKxVWUAVWUtwAv7VC2z280aVAFwI0_Gr0_Cr1lOx8S6xCaFV Cjc4AY6r1j6r4UM4x0Y48IcxkI7VAKI48JM4x0Y48IcxkI7VAKI48G6xCjnVAKz4kxMxkI ecxEwVAFwVW8uwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c 02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jr0_ JrylIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr 1lIxAIcVCF04k26cxKx2IYs7xG6r1I6r4UMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvE x4A2jsIEc7CjxVAFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7IU0nL05UUUUU== X-CM-SenderInfo: p1lq2x5l1r3gtki6z05rqj20fqof0/ Subject: [FFmpeg-devel] [PATCH 3/9] avcodec/mips: [loongson] reoptimize h264_chroma_mc8_mmi v2. X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches MIME-Version: 1.0 Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" Reoptimize function ff_put_h264_chroma_mc8_mmi and ff_avg_h264_chroma_mc8_mmi v2. Change-Id: I24c72ce5f5ef537faa603fdf5c56ecdd1327034d Signed-off-by: Shiyou Yin --- libavcodec/mips/h264chroma_mmi.c | 740 ++++++++++++++++++++++++--------------- 1 file changed, 454 insertions(+), 286 deletions(-) diff --git a/libavcodec/mips/h264chroma_mmi.c b/libavcodec/mips/h264chroma_mmi.c index bafe0f9..7087dbf 100644 --- a/libavcodec/mips/h264chroma_mmi.c +++ b/libavcodec/mips/h264chroma_mmi.c @@ -29,326 +29,323 @@ void ff_put_h264_chroma_mc8_mmi(uint8_t *dst, uint8_t *src, ptrdiff_t stride, int h, int x, int y) { - const int A = (8 - x) * (8 - y); - const int B = x * (8 - y); - const int C = (8 - x) * y; - const int D = x * y; - const int E = B + C; + int A = 64, B, C, D, E; double ftmp[10]; uint64_t tmp[1]; - mips_reg addr[1]; DECLARE_VAR_ALL64; - if (D) { + if ((x == 0) && (y == 0)) { // x == 0, y == 0 + /* A=64 */ __asm__ volatile ( - "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" - "dli %[tmp0], 0x06 \n\t" - "pshufh %[A], %[A], %[ftmp0] \n\t" - "pshufh %[B], %[B], %[ftmp0] \n\t" - "mtc1 %[tmp0], %[ftmp9] \n\t" - "pshufh %[C], %[C], %[ftmp0] \n\t" - "pshufh %[D], %[D], %[ftmp0] \n\t" + "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" + "dli %[tmp0], 0x06 \n\t" + "mtc1 %[tmp0], %[ftmp4] \n\t" - "1: \n\t" - PTR_ADDU "%[addr0], %[src], %[stride] \n\t" + "1: \n\t" MMI_ULDC1(%[ftmp1], %[src], 0x00) - MMI_ULDC1(%[ftmp2], %[src], 0x01) - MMI_ULDC1(%[ftmp3], %[addr0], 0x00) - MMI_ULDC1(%[ftmp4], %[addr0], 0x01) - - "punpcklbh %[ftmp5], %[ftmp1], %[ftmp0] \n\t" - "punpckhbh %[ftmp6], %[ftmp1], %[ftmp0] \n\t" - "punpcklbh %[ftmp7], %[ftmp2], %[ftmp0] \n\t" - "punpckhbh %[ftmp8], %[ftmp2], %[ftmp0] \n\t" - "pmullh %[ftmp5], %[ftmp5], %[A] \n\t" - "pmullh %[ftmp7], %[ftmp7], %[B] \n\t" - "paddh %[ftmp1], %[ftmp5], %[ftmp7] \n\t" - "pmullh %[ftmp6], %[ftmp6], %[A] \n\t" - "pmullh %[ftmp8], %[ftmp8], %[B] \n\t" - "paddh %[ftmp2], %[ftmp6], %[ftmp8] \n\t" - - "punpcklbh %[ftmp5], %[ftmp3], %[ftmp0] \n\t" - "punpckhbh %[ftmp6], %[ftmp3], %[ftmp0] \n\t" - "punpcklbh %[ftmp7], %[ftmp4], %[ftmp0] \n\t" - "punpckhbh %[ftmp8], %[ftmp4], %[ftmp0] \n\t" - "pmullh %[ftmp5], %[ftmp5], %[C] \n\t" - "pmullh %[ftmp7], %[ftmp7], %[D] \n\t" - "paddh %[ftmp3], %[ftmp5], %[ftmp7] \n\t" - "pmullh %[ftmp6], %[ftmp6], %[C] \n\t" - "pmullh %[ftmp8], %[ftmp8], %[D] \n\t" - "paddh %[ftmp4], %[ftmp6], %[ftmp8] \n\t" - - "paddh %[ftmp1], %[ftmp1], %[ftmp3] \n\t" - "paddh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" - "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" - "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" - "psrlh %[ftmp1], %[ftmp1], %[ftmp9] \n\t" - "psrlh %[ftmp2], %[ftmp2], %[ftmp9] \n\t" - "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - "addi %[h], %[h], -0x01 \n\t" + "addi %[h], %[h], -0x04 \n\t" + PTR_ADDU "%[src], %[src], %[stride] \n\t" + MMI_ULDC1(%[ftmp5], %[src], 0x00) + PTR_ADDU "%[src], %[src], %[stride] \n\t" + MMI_ULDC1(%[ftmp6], %[src], 0x00) + PTR_ADDU "%[src], %[src], %[stride] \n\t" + MMI_ULDC1(%[ftmp7], %[src], 0x00) + + "punpcklbh %[ftmp2], %[ftmp1], %[ftmp0] \n\t" + "punpckhbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" + "psllh %[ftmp1], %[ftmp2], %[ftmp4] \n\t" + "psllh %[ftmp2], %[ftmp3], %[ftmp4] \n\t" + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp4] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" MMI_SDC1(%[ftmp1], %[dst], 0x00) - PTR_ADDU "%[src], %[src], %[stride] \n\t" - PTR_ADDU "%[dst], %[dst], %[stride] \n\t" - "bnez %[h], 1b \n\t" - : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), - [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), - [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), - [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), - [ftmp8]"=&f"(ftmp[8]), [ftmp9]"=&f"(ftmp[9]), - [tmp0]"=&r"(tmp[0]), - RESTRICT_ASM_ALL64 - [addr0]"=&r"(addr[0]), - [dst]"+&r"(dst), [src]"+&r"(src), - [h]"+&r"(h) - : [stride]"r"((mips_reg)stride),[ff_pw_32]"f"(ff_pw_32), - [A]"f"(A), [B]"f"(B), - [C]"f"(C), [D]"f"(D) - : "memory" - ); - } else if (E) { - const int step = C ? stride : 1; - - __asm__ volatile ( - "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" - "dli %[tmp0], 0x06 \n\t" - "pshufh %[A], %[A], %[ftmp0] \n\t" - "pshufh %[E], %[E], %[ftmp0] \n\t" - "mtc1 %[tmp0], %[ftmp7] \n\t" - - "1: \n\t" - PTR_ADDU "%[addr0], %[src], %[step] \n\t" - MMI_ULDC1(%[ftmp1], %[src], 0x00) - MMI_ULDC1(%[ftmp2], %[addr0], 0x00) - "punpcklbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" - "punpckhbh %[ftmp4], %[ftmp1], %[ftmp0] \n\t" - "punpcklbh %[ftmp5], %[ftmp2], %[ftmp0] \n\t" - "punpckhbh %[ftmp6], %[ftmp2], %[ftmp0] \n\t" - "pmullh %[ftmp3], %[ftmp3], %[A] \n\t" - "pmullh %[ftmp5], %[ftmp5], %[E] \n\t" - "paddh %[ftmp1], %[ftmp3], %[ftmp5] \n\t" - "pmullh %[ftmp4], %[ftmp4], %[A] \n\t" - "pmullh %[ftmp6], %[ftmp6], %[E] \n\t" - "paddh %[ftmp2], %[ftmp4], %[ftmp6] \n\t" - - "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" - "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" - "psrlh %[ftmp1], %[ftmp1], %[ftmp7] \n\t" - "psrlh %[ftmp2], %[ftmp2], %[ftmp7] \n\t" - "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - "addi %[h], %[h], -0x01 \n\t" + "punpcklbh %[ftmp2], %[ftmp5], %[ftmp0] \n\t" + "punpckhbh %[ftmp3], %[ftmp5], %[ftmp0] \n\t" + "psllh %[ftmp1], %[ftmp2], %[ftmp4] \n\t" + "psllh %[ftmp2], %[ftmp3], %[ftmp4] \n\t" + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp4] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" MMI_SDC1(%[ftmp1], %[dst], 0x00) - PTR_ADDU "%[src], %[src], %[stride] \n\t" - PTR_ADDU "%[dst], %[dst], %[stride] \n\t" - "bnez %[h], 1b \n\t" - : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), - [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), - [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), - [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), - [tmp0]"=&r"(tmp[0]), - RESTRICT_ASM_ALL64 - [addr0]"=&r"(addr[0]), - [dst]"+&r"(dst), [src]"+&r"(src), - [h]"+&r"(h) - : [stride]"r"((mips_reg)stride),[step]"r"((mips_reg)step), - [ff_pw_32]"f"(ff_pw_32), - [A]"f"(A), [E]"f"(E) - : "memory" - ); - } else { - __asm__ volatile ( - "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" - "dli %[tmp0], 0x06 \n\t" - "pshufh %[A], %[A], %[ftmp0] \n\t" - "mtc1 %[tmp0], %[ftmp4] \n\t" - "1: \n\t" - MMI_ULDC1(%[ftmp1], %[src], 0x00) - "punpcklbh %[ftmp2], %[ftmp1], %[ftmp0] \n\t" - "punpckhbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" - "pmullh %[ftmp1], %[ftmp2], %[A] \n\t" - "pmullh %[ftmp2], %[ftmp3], %[A] \n\t" - "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" - "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" - "psrlh %[ftmp1], %[ftmp1], %[ftmp4] \n\t" - "psrlh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" - "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - PTR_ADDU "%[src], %[src], %[stride] \n\t" + "punpcklbh %[ftmp2], %[ftmp6], %[ftmp0] \n\t" + "punpckhbh %[ftmp3], %[ftmp6], %[ftmp0] \n\t" + "psllh %[ftmp1], %[ftmp2], %[ftmp4] \n\t" + "psllh %[ftmp2], %[ftmp3], %[ftmp4] \n\t" + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp4] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" MMI_SDC1(%[ftmp1], %[dst], 0x00) - PTR_ADDU "%[dst], %[dst], %[stride] \n\t" - MMI_ULDC1(%[ftmp1], %[src], 0x00) - "punpcklbh %[ftmp2], %[ftmp1], %[ftmp0] \n\t" - "punpckhbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" - "pmullh %[ftmp1], %[ftmp2], %[A] \n\t" - "pmullh %[ftmp2], %[ftmp3], %[A] \n\t" - "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" - "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" - "psrlh %[ftmp1], %[ftmp1], %[ftmp4] \n\t" - "psrlh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" - "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - "addi %[h], %[h], -0x02 \n\t" + "punpcklbh %[ftmp2], %[ftmp7], %[ftmp0] \n\t" + "punpckhbh %[ftmp3], %[ftmp7], %[ftmp0] \n\t" + "psllh %[ftmp1], %[ftmp2], %[ftmp4] \n\t" + "psllh %[ftmp2], %[ftmp3], %[ftmp4] \n\t" + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp4] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" MMI_SDC1(%[ftmp1], %[dst], 0x00) - PTR_ADDU "%[src], %[src], %[stride] \n\t" - PTR_ADDU "%[dst], %[dst], %[stride] \n\t" - "bnez %[h], 1b \n\t" + PTR_ADDU "%[src], %[src], %[stride] \n\t" + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + "bnez %[h], 1b \n\t" : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), - [ftmp4]"=&f"(ftmp[4]), + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), + [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), [tmp0]"=&r"(tmp[0]), RESTRICT_ASM_ALL64 [dst]"+&r"(dst), [src]"+&r"(src), [h]"+&r"(h) - : [stride]"r"((mips_reg)stride),[ff_pw_32]"f"(ff_pw_32), - [A]"f"(A) + : [stride]"r"((mips_reg)stride),[ff_pw_32]"f"(ff_pw_32) : "memory" ); + } else { + if (x && y) { // x != 0, y != 0 + D = x * y; + B = (x << 3) - D; + C = (y << 3) - D; + A -= (D + B + C); + + __asm__ volatile ( + "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" + "dli %[tmp0], 0x06 \n\t" + "pshufh %[A], %[A], %[ftmp0] \n\t" + "pshufh %[B], %[B], %[ftmp0] \n\t" + "mtc1 %[tmp0], %[ftmp9] \n\t" + "pshufh %[C], %[C], %[ftmp0] \n\t" + "pshufh %[D], %[D], %[ftmp0] \n\t" + + "1: \n\t" + MMI_ULDC1(%[ftmp1], %[src], 0x00) + MMI_ULDC1(%[ftmp2], %[src], 0x01) + PTR_ADDU "%[src], %[src], %[stride] \n\t" + MMI_ULDC1(%[ftmp3], %[src], 0x00) + MMI_ULDC1(%[ftmp4], %[src], 0x01) + "addi %[h], %[h], -0x02 \n\t" + + "punpcklbh %[ftmp5], %[ftmp1], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp1], %[ftmp0] \n\t" + "punpcklbh %[ftmp7], %[ftmp2], %[ftmp0] \n\t" + "punpckhbh %[ftmp8], %[ftmp2], %[ftmp0] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[A] \n\t" + "pmullh %[ftmp7], %[ftmp7], %[B] \n\t" + "paddh %[ftmp1], %[ftmp5], %[ftmp7] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[A] \n\t" + "pmullh %[ftmp8], %[ftmp8], %[B] \n\t" + "paddh %[ftmp2], %[ftmp6], %[ftmp8] \n\t" + + "punpcklbh %[ftmp5], %[ftmp3], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp3], %[ftmp0] \n\t" + "punpcklbh %[ftmp7], %[ftmp4], %[ftmp0] \n\t" + "punpckhbh %[ftmp8], %[ftmp4], %[ftmp0] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[C] \n\t" + "pmullh %[ftmp7], %[ftmp7], %[D] \n\t" + "paddh %[ftmp3], %[ftmp5], %[ftmp7] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[C] \n\t" + "pmullh %[ftmp8], %[ftmp8], %[D] \n\t" + "paddh %[ftmp4], %[ftmp6], %[ftmp8] \n\t" + + "paddh %[ftmp1], %[ftmp1], %[ftmp3] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp9] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp9] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_SDC1(%[ftmp1], %[dst], 0x00) + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + + MMI_ULDC1(%[ftmp1], %[src], 0x00) + MMI_ULDC1(%[ftmp2], %[src], 0x01) + PTR_ADDU "%[src], %[src], %[stride] \n\t" + MMI_ULDC1(%[ftmp3], %[src], 0x00) + MMI_ULDC1(%[ftmp4], %[src], 0x01) + + "punpcklbh %[ftmp5], %[ftmp1], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp1], %[ftmp0] \n\t" + "punpcklbh %[ftmp7], %[ftmp2], %[ftmp0] \n\t" + "punpckhbh %[ftmp8], %[ftmp2], %[ftmp0] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[A] \n\t" + "pmullh %[ftmp7], %[ftmp7], %[B] \n\t" + "paddh %[ftmp1], %[ftmp5], %[ftmp7] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[A] \n\t" + "pmullh %[ftmp8], %[ftmp8], %[B] \n\t" + "paddh %[ftmp2], %[ftmp6], %[ftmp8] \n\t" + + "punpcklbh %[ftmp5], %[ftmp3], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp3], %[ftmp0] \n\t" + "punpcklbh %[ftmp7], %[ftmp4], %[ftmp0] \n\t" + "punpckhbh %[ftmp8], %[ftmp4], %[ftmp0] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[C] \n\t" + "pmullh %[ftmp7], %[ftmp7], %[D] \n\t" + "paddh %[ftmp3], %[ftmp5], %[ftmp7] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[C] \n\t" + "pmullh %[ftmp8], %[ftmp8], %[D] \n\t" + "paddh %[ftmp4], %[ftmp6], %[ftmp8] \n\t" + + "paddh %[ftmp1], %[ftmp1], %[ftmp3] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp9] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp9] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_SDC1(%[ftmp1], %[dst], 0x00) + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + + "bnez %[h], 1b \n\t" + : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), + [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), + [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), + [ftmp8]"=&f"(ftmp[8]), [ftmp9]"=&f"(ftmp[9]), + [tmp0]"=&r"(tmp[0]), + RESTRICT_ASM_ALL64 + [dst]"+&r"(dst), [src]"+&r"(src), + [h]"+&r"(h) + : [stride]"r"((mips_reg)stride),[ff_pw_32]"f"(ff_pw_32), + [A]"f"(A), [B]"f"(B), + [C]"f"(C), [D]"f"(D) + : "memory" + ); + } else { + if (x) { // x != 0 , y == 0 + E = x << 3; + A -= E; + + __asm__ volatile ( + "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" + "dli %[tmp0], 0x06 \n\t" + "pshufh %[A], %[A], %[ftmp0] \n\t" + "pshufh %[E], %[E], %[ftmp0] \n\t" + "mtc1 %[tmp0], %[ftmp7] \n\t" + + "1: \n\t" + MMI_ULDC1(%[ftmp1], %[src], 0x00) + MMI_ULDC1(%[ftmp2], %[src], 0x01) + "addi %[h], %[h], -0x01 \n\t" + PTR_ADDU "%[src], %[src], %[stride] \n\t" + + "punpcklbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" + "punpckhbh %[ftmp4], %[ftmp1], %[ftmp0] \n\t" + "punpcklbh %[ftmp5], %[ftmp2], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp2], %[ftmp0] \n\t" + "pmullh %[ftmp3], %[ftmp3], %[A] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[E] \n\t" + "paddh %[ftmp1], %[ftmp3], %[ftmp5] \n\t" + "pmullh %[ftmp4], %[ftmp4], %[A] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[E] \n\t" + "paddh %[ftmp2], %[ftmp4], %[ftmp6] \n\t" + + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp7] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp7] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_SDC1(%[ftmp1], %[dst], 0x00) + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + "bnez %[h], 1b \n\t" + : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), + [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), + [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), + [tmp0]"=&r"(tmp[0]), + RESTRICT_ASM_ALL64 + [dst]"+&r"(dst), [src]"+&r"(src), + [h]"+&r"(h) + : [stride]"r"((mips_reg)stride), + [ff_pw_32]"f"(ff_pw_32), + [A]"f"(A), [E]"f"(E) + : "memory" + ); + } else { // x == 0 , y != 0 + E = y << 3; + A -= E; + + __asm__ volatile ( + "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" + "dli %[tmp0], 0x06 \n\t" + "pshufh %[A], %[A], %[ftmp0] \n\t" + "pshufh %[E], %[E], %[ftmp0] \n\t" + "mtc1 %[tmp0], %[ftmp7] \n\t" + + "1: \n\t" + MMI_ULDC1(%[ftmp1], %[src], 0x00) + PTR_ADDU "%[src], %[src], %[stride] \n\t" + MMI_ULDC1(%[ftmp2], %[src], 0x00) + "addi %[h], %[h], -0x01 \n\t" + + "punpcklbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" + "punpckhbh %[ftmp4], %[ftmp1], %[ftmp0] \n\t" + "punpcklbh %[ftmp5], %[ftmp2], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp2], %[ftmp0] \n\t" + "pmullh %[ftmp3], %[ftmp3], %[A] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[E] \n\t" + "paddh %[ftmp1], %[ftmp3], %[ftmp5] \n\t" + "pmullh %[ftmp4], %[ftmp4], %[A] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[E] \n\t" + "paddh %[ftmp2], %[ftmp4], %[ftmp6] \n\t" + + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp7] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp7] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_SDC1(%[ftmp1], %[dst], 0x00) + + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + "bnez %[h], 1b \n\t" + : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), + [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), + [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), + [tmp0]"=&r"(tmp[0]), + RESTRICT_ASM_ALL64 + [dst]"+&r"(dst), [src]"+&r"(src), + [h]"+&r"(h) + : [stride]"r"((mips_reg)stride), + [ff_pw_32]"f"(ff_pw_32), + [A]"f"(A), [E]"f"(E) + : "memory" + ); + } + } } } void ff_avg_h264_chroma_mc8_mmi(uint8_t *dst, uint8_t *src, ptrdiff_t stride, int h, int x, int y) { - const int A = (8 - x) * (8 - y); - const int B = x * (8 - y); - const int C = (8 - x) * y; - const int D = x * y; - const int E = B + C; + int A = 64, B, C, D, E; double ftmp[10]; uint64_t tmp[1]; - mips_reg addr[1]; DECLARE_VAR_ALL64; - - if (D) { + if((x == 0) && (y == 0)){ // x == 0, y == 0 __asm__ volatile ( "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" "dli %[tmp0], 0x06 \n\t" "pshufh %[A], %[A], %[ftmp0] \n\t" - "pshufh %[B], %[B], %[ftmp0] \n\t" - "mtc1 %[tmp0], %[ftmp9] \n\t" - "pshufh %[C], %[C], %[ftmp0] \n\t" - "pshufh %[D], %[D], %[ftmp0] \n\t" + "mtc1 %[tmp0], %[ftmp4] \n\t" "1: \n\t" - PTR_ADDU "%[addr0], %[src], %[stride] \n\t" MMI_ULDC1(%[ftmp1], %[src], 0x00) - MMI_ULDC1(%[ftmp2], %[src], 0x01) - MMI_ULDC1(%[ftmp3], %[addr0], 0x00) - MMI_ULDC1(%[ftmp4], %[addr0], 0x01) - - "punpcklbh %[ftmp5], %[ftmp1], %[ftmp0] \n\t" - "punpckhbh %[ftmp6], %[ftmp1], %[ftmp0] \n\t" - "punpcklbh %[ftmp7], %[ftmp2], %[ftmp0] \n\t" - "punpckhbh %[ftmp8], %[ftmp2], %[ftmp0] \n\t" - "pmullh %[ftmp5], %[ftmp5], %[A] \n\t" - "pmullh %[ftmp7], %[ftmp7], %[B] \n\t" - "paddh %[ftmp1], %[ftmp5], %[ftmp7] \n\t" - "pmullh %[ftmp6], %[ftmp6], %[A] \n\t" - "pmullh %[ftmp8], %[ftmp8], %[B] \n\t" - "paddh %[ftmp2], %[ftmp6], %[ftmp8] \n\t" - - "punpcklbh %[ftmp5], %[ftmp3], %[ftmp0] \n\t" - "punpckhbh %[ftmp6], %[ftmp3], %[ftmp0] \n\t" - "punpcklbh %[ftmp7], %[ftmp4], %[ftmp0] \n\t" - "punpckhbh %[ftmp8], %[ftmp4], %[ftmp0] \n\t" - "pmullh %[ftmp5], %[ftmp5], %[C] \n\t" - "pmullh %[ftmp7], %[ftmp7], %[D] \n\t" - "paddh %[ftmp3], %[ftmp5], %[ftmp7] \n\t" - "pmullh %[ftmp6], %[ftmp6], %[C] \n\t" - "pmullh %[ftmp8], %[ftmp8], %[D] \n\t" - "paddh %[ftmp4], %[ftmp6], %[ftmp8] \n\t" - - "paddh %[ftmp1], %[ftmp1], %[ftmp3] \n\t" - "paddh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" - "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" - "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" - "psrlh %[ftmp1], %[ftmp1], %[ftmp9] \n\t" - "psrlh %[ftmp2], %[ftmp2], %[ftmp9] \n\t" - "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - MMI_LDC1(%[ftmp2], %[dst], 0x00) - "pavgb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - "addi %[h], %[h], -0x01 \n\t" - MMI_SDC1(%[ftmp1], %[dst], 0x00) - PTR_ADDU "%[dst], %[dst], %[stride] \n\t" PTR_ADDU "%[src], %[src], %[stride] \n\t" - "bnez %[h], 1b \n\t" - : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), - [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), - [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), - [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), - [ftmp8]"=&f"(ftmp[8]), [ftmp9]"=&f"(ftmp[9]), - [tmp0]"=&r"(tmp[0]), - RESTRICT_ASM_ALL64 - [addr0]"=&r"(addr[0]), - [dst]"+&r"(dst), [src]"+&r"(src), - [h]"+&r"(h) - : [stride]"r"((mips_reg)stride),[ff_pw_32]"f"(ff_pw_32), - [A]"f"(A), [B]"f"(B), - [C]"f"(C), [D]"f"(D) - : "memory" - ); - } else if (E) { - const int step = C ? stride : 1; - - __asm__ volatile ( - "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" - "dli %[tmp0], 0x06 \n\t" - "pshufh %[A], %[A], %[ftmp0] \n\t" - "pshufh %[E], %[E], %[ftmp0] \n\t" - "mtc1 %[tmp0], %[ftmp7] \n\t" - - "1: \n\t" - PTR_ADDU "%[addr0], %[src], %[step] \n\t" - MMI_ULDC1(%[ftmp1], %[src], 0x00) - MMI_ULDC1(%[ftmp2], %[addr0], 0x00) - - "punpcklbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" - "punpckhbh %[ftmp4], %[ftmp1], %[ftmp0] \n\t" - "punpcklbh %[ftmp5], %[ftmp2], %[ftmp0] \n\t" - "punpckhbh %[ftmp6], %[ftmp2], %[ftmp0] \n\t" - "pmullh %[ftmp3], %[ftmp3], %[A] \n\t" - "pmullh %[ftmp5], %[ftmp5], %[E] \n\t" - "paddh %[ftmp1], %[ftmp3], %[ftmp5] \n\t" - "pmullh %[ftmp4], %[ftmp4], %[A] \n\t" - "pmullh %[ftmp6], %[ftmp6], %[E] \n\t" - "paddh %[ftmp2], %[ftmp4], %[ftmp6] \n\t" - - "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" - "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" - "psrlh %[ftmp1], %[ftmp1], %[ftmp7] \n\t" - "psrlh %[ftmp2], %[ftmp2], %[ftmp7] \n\t" - "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - MMI_LDC1(%[ftmp2], %[dst], 0x00) - "pavgb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - "addi %[h], %[h], -0x01 \n\t" - MMI_SDC1(%[ftmp1], %[dst], 0x00) + MMI_ULDC1(%[ftmp5], %[src], 0x00) PTR_ADDU "%[src], %[src], %[stride] \n\t" - PTR_ADDU "%[dst], %[dst], %[stride] \n\t" - "bnez %[h], 1b \n\t" - : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), - [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), - [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), - [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), - [tmp0]"=&r"(tmp[0]), - RESTRICT_ASM_ALL64 - [addr0]"=&r"(addr[0]), - [dst]"+&r"(dst), [src]"+&r"(src), - [h]"+&r"(h) - : [stride]"r"((mips_reg)stride),[step]"r"((mips_reg)step), - [ff_pw_32]"f"(ff_pw_32), - [A]"f"(A), [E]"f"(E) - : "memory" - ); - } else { - __asm__ volatile ( - "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" - "dli %[tmp0], 0x06 \n\t" - "pshufh %[A], %[A], %[ftmp0] \n\t" - "mtc1 %[tmp0], %[ftmp4] \n\t" - "1: \n\t" - MMI_ULDC1(%[ftmp1], %[src], 0x00) "punpcklbh %[ftmp2], %[ftmp1], %[ftmp0] \n\t" "punpckhbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" "pmullh %[ftmp1], %[ftmp2], %[A] \n\t" @@ -360,13 +357,11 @@ void ff_avg_h264_chroma_mc8_mmi(uint8_t *dst, uint8_t *src, ptrdiff_t stride, "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" MMI_LDC1(%[ftmp2], %[dst], 0x00) "pavgb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - PTR_ADDU "%[src], %[src], %[stride] \n\t" MMI_SDC1(%[ftmp1], %[dst], 0x00) PTR_ADDU "%[dst], %[dst], %[stride] \n\t" - MMI_ULDC1(%[ftmp1], %[src], 0x00) - "punpcklbh %[ftmp2], %[ftmp1], %[ftmp0] \n\t" - "punpckhbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" + "punpcklbh %[ftmp2], %[ftmp5], %[ftmp0] \n\t" + "punpckhbh %[ftmp3], %[ftmp5], %[ftmp0] \n\t" "pmullh %[ftmp1], %[ftmp2], %[A] \n\t" "pmullh %[ftmp2], %[ftmp3], %[A] \n\t" "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" @@ -376,15 +371,14 @@ void ff_avg_h264_chroma_mc8_mmi(uint8_t *dst, uint8_t *src, ptrdiff_t stride, "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" MMI_LDC1(%[ftmp2], %[dst], 0x00) "pavgb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - "addi %[h], %[h], -0x02 \n\t" MMI_SDC1(%[ftmp1], %[dst], 0x00) - - PTR_ADDU "%[src], %[src], %[stride] \n\t" PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + + "addi %[h], %[h], -0x02 \n\t" "bnez %[h], 1b \n\t" : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), - [ftmp4]"=&f"(ftmp[4]), + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), [tmp0]"=&r"(tmp[0]), RESTRICT_ASM_ALL64 [dst]"+&r"(dst), [src]"+&r"(src), @@ -393,6 +387,180 @@ void ff_avg_h264_chroma_mc8_mmi(uint8_t *dst, uint8_t *src, ptrdiff_t stride, [A]"f"(A) : "memory" ); + } else { + if(x && y) { // x != 0, y != 0 + D = x * y; + B = (x << 3) - D; + C = (y << 3) - D; + A -= (D + B + C); + __asm__ volatile ( + "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" + "dli %[tmp0], 0x06 \n\t" + "pshufh %[A], %[A], %[ftmp0] \n\t" + "pshufh %[B], %[B], %[ftmp0] \n\t" + "mtc1 %[tmp0], %[ftmp9] \n\t" + "pshufh %[C], %[C], %[ftmp0] \n\t" + "pshufh %[D], %[D], %[ftmp0] \n\t" + + "1: \n\t" + MMI_ULDC1(%[ftmp1], %[src], 0x00) + MMI_ULDC1(%[ftmp2], %[src], 0x01) + PTR_ADDU "%[src], %[src], %[stride] \n\t" + MMI_ULDC1(%[ftmp3], %[src], 0x00) + MMI_ULDC1(%[ftmp4], %[src], 0x01) + "addi %[h], %[h], -0x01 \n\t" + + "punpcklbh %[ftmp5], %[ftmp1], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp1], %[ftmp0] \n\t" + "punpcklbh %[ftmp7], %[ftmp2], %[ftmp0] \n\t" + "punpckhbh %[ftmp8], %[ftmp2], %[ftmp0] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[A] \n\t" + "pmullh %[ftmp7], %[ftmp7], %[B] \n\t" + "paddh %[ftmp1], %[ftmp5], %[ftmp7] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[A] \n\t" + "pmullh %[ftmp8], %[ftmp8], %[B] \n\t" + "paddh %[ftmp2], %[ftmp6], %[ftmp8] \n\t" + + "punpcklbh %[ftmp5], %[ftmp3], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp3], %[ftmp0] \n\t" + "punpcklbh %[ftmp7], %[ftmp4], %[ftmp0] \n\t" + "punpckhbh %[ftmp8], %[ftmp4], %[ftmp0] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[C] \n\t" + "pmullh %[ftmp7], %[ftmp7], %[D] \n\t" + "paddh %[ftmp3], %[ftmp5], %[ftmp7] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[C] \n\t" + "pmullh %[ftmp8], %[ftmp8], %[D] \n\t" + "paddh %[ftmp4], %[ftmp6], %[ftmp8] \n\t" + + "paddh %[ftmp1], %[ftmp1], %[ftmp3] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp9] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp9] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_LDC1(%[ftmp2], %[dst], 0x00) + "pavgb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_SDC1(%[ftmp1], %[dst], 0x00) + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + "bnez %[h], 1b \n\t" + : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), + [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), + [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), + [ftmp8]"=&f"(ftmp[8]), [ftmp9]"=&f"(ftmp[9]), + [tmp0]"=&r"(tmp[0]), + RESTRICT_ASM_ALL64 + [dst]"+&r"(dst), [src]"+&r"(src), + [h]"+&r"(h) + : [stride]"r"((mips_reg)stride),[ff_pw_32]"f"(ff_pw_32), + [A]"f"(A), [B]"f"(B), + [C]"f"(C), [D]"f"(D) + : "memory" + ); + } else { + if(x) { // x != 0 , y == 0 + E = x << 3; + A -= E; + __asm__ volatile ( + "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" + "dli %[tmp0], 0x06 \n\t" + "pshufh %[A], %[A], %[ftmp0] \n\t" + "pshufh %[E], %[E], %[ftmp0] \n\t" + "mtc1 %[tmp0], %[ftmp7] \n\t" + + "1: \n\t" + MMI_ULDC1(%[ftmp1], %[src], 0x00) + MMI_ULDC1(%[ftmp2], %[src], 0x01) + PTR_ADDU "%[src], %[src], %[stride] \n\t" + "addi %[h], %[h], -0x01 \n\t" + + "punpcklbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" + "punpckhbh %[ftmp4], %[ftmp1], %[ftmp0] \n\t" + "punpcklbh %[ftmp5], %[ftmp2], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp2], %[ftmp0] \n\t" + "pmullh %[ftmp3], %[ftmp3], %[A] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[E] \n\t" + "paddh %[ftmp1], %[ftmp3], %[ftmp5] \n\t" + "pmullh %[ftmp4], %[ftmp4], %[A] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[E] \n\t" + "paddh %[ftmp2], %[ftmp4], %[ftmp6] \n\t" + + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp7] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp7] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_LDC1(%[ftmp2], %[dst], 0x00) + "pavgb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_SDC1(%[ftmp1], %[dst], 0x00) + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + "bnez %[h], 1b \n\t" + : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), + [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), + [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), + [tmp0]"=&r"(tmp[0]), + RESTRICT_ASM_ALL64 + [dst]"+&r"(dst), [src]"+&r"(src), + [h]"+&r"(h) + : [stride]"r"((mips_reg)stride), + [ff_pw_32]"f"(ff_pw_32), + [A]"f"(A), [E]"f"(E) + : "memory" + ); + } else { + E = y << 3; + A -= E; + __asm__ volatile ( + "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" + "dli %[tmp0], 0x06 \n\t" + "pshufh %[A], %[A], %[ftmp0] \n\t" + "pshufh %[E], %[E], %[ftmp0] \n\t" + "mtc1 %[tmp0], %[ftmp7] \n\t" + + "1: \n\t" + MMI_ULDC1(%[ftmp1], %[src], 0x00) + PTR_ADDU "%[src], %[src], %[stride] \n\t" + MMI_ULDC1(%[ftmp2], %[src], 0x00) + "addi %[h], %[h], -0x01 \n\t" + + "punpcklbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" + "punpckhbh %[ftmp4], %[ftmp1], %[ftmp0] \n\t" + "punpcklbh %[ftmp5], %[ftmp2], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp2], %[ftmp0] \n\t" + "pmullh %[ftmp3], %[ftmp3], %[A] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[E] \n\t" + "paddh %[ftmp1], %[ftmp3], %[ftmp5] \n\t" + "pmullh %[ftmp4], %[ftmp4], %[A] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[E] \n\t" + "paddh %[ftmp2], %[ftmp4], %[ftmp6] \n\t" + + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp7] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp7] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_LDC1(%[ftmp2], %[dst], 0x00) + "pavgb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_SDC1(%[ftmp1], %[dst], 0x00) + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + "bnez %[h], 1b \n\t" + : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), + [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), + [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), + [tmp0]"=&r"(tmp[0]), + RESTRICT_ASM_ALL64 + [dst]"+&r"(dst), [src]"+&r"(src), + [h]"+&r"(h) + : [stride]"r"((mips_reg)stride), + [ff_pw_32]"f"(ff_pw_32), + [A]"f"(A), [E]"f"(E) + : "memory" + ); + } + } } }