From patchwork Tue Sep 6 18:43:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?R=C3=A9mi_Denis-Courmont?= X-Patchwork-Id: 34808 Delivered-To: ffmpegpatchwork2@gmail.com Received: by 2002:a05:6a20:139a:b0:8f:1db5:eae2 with SMTP id w26csp3443331pzh; Tue, 6 Sep 2022 11:43:33 -0700 (PDT) X-Google-Smtp-Source: AA6agR5TZM0gCEuieUHDPzdmecrMHhV//QntVfQfRU5L4Dr0AVxTrLSQEob8b9NH2T0jfe2OiwQw X-Received: by 2002:a17:907:7ba4:b0:767:23c3:f3ed with SMTP id ne36-20020a1709077ba400b0076723c3f3edmr9067568ejc.569.1662489813225; Tue, 06 Sep 2022 11:43:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1662489813; cv=none; d=google.com; s=arc-20160816; b=0ZA2UdskFaPnDz84gb4ggIvak0XJaj0b3YSaT5gdlN/Jxo953LFeI9zTQrSAoSn4Hl EJ3PzfMc1Nu4/7VXqFO2zrGjDCtPkspG3eLB1lgznxFmc4g2+uGfcGf93gHhLVtykIVj 4yvINzFf+pteyWunLhiHEzoW2u5VAtS/DWzxecCeNWLNdBA2XL8lOKdkUW/IY6YAu5+v AEBsrCIO2LFBzlPPLW5GhFRZCSoiXn/pUTMqKkZu0ABF9MIWyXCN0o5IKVGXHbVP0C3a vMAxoBrenh0Ttb3eB6xpQsXO5tv+WT1iLjv5lhimn9K6gX3zjMxt7CX4lJyfGOehUf/y 7K+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:reply-to:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:subject:mime-version:organization:message-id:date:to :from:delivered-to; bh=So2GncplL4pWexeP/YIl+XPkfG4yaLSfCI6bVdRefmE=; b=Ym9MVdBPP2DXD3RxHBXWtAiS3r8BfOMenlNdlFSv2syEolQsFuYJSdrqJM6yDgAjLI qHDPQdl6CZcpHIaqb5X1snsvNzYfeT9UrxjoYRTiPHNiz3chY7cMJjZC6G5yy1bcSJOA IIOEv6M1qL7L0v9VKPd4d2CYsSO1wJWWnA0LsZo+kAkmtTcaoG0+CX78QT0RYgQgxLDF 6DA/d4W7Ii9MNFyT8MBQLET2UqNa6r2TCkyl/rj9VtMGRl/tWVrJJgK/9bi99TeYEXb4 o9VQpDdly/SpVgHs+sTcIdMr2B2cYlYBn73TTcRA3cZ2wLmLrKXUVo6M1GFjushdu+iI N5tg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Return-Path: Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org. [79.124.17.100]) by mx.google.com with ESMTP id z12-20020a056402274c00b0044699451386si11989574edd.9.2022.09.06.11.43.32; Tue, 06 Sep 2022 11:43:33 -0700 (PDT) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id E0F7268BAF2; Tue, 6 Sep 2022 21:43:27 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from ursule.remlab.net (vps-a2bccee9.vps.ovh.net [51.75.19.47]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id D315B68B441 for ; Tue, 6 Sep 2022 21:43:21 +0300 (EEST) Received: from ursule.remlab.net (localhost [IPv6:::1]) by ursule.remlab.net (Postfix) with ESMTP id 7A645C00AD for ; Tue, 6 Sep 2022 21:43:21 +0300 (EEST) Received: from basile.remlab.net ([2001:14ba:a080:a501:23a6:ebae:8f2a:4d73]) by ursule.remlab.net with ESMTPSA id 3s8FG8mUF2O4KwAAwZXkwQ (envelope-from ) for ; Tue, 06 Sep 2022 21:43:21 +0300 From: =?iso-8859-1?q?R=E9mi?= Denis-Courmont To: ffmpeg-devel@ffmpeg.org Date: Tue, 06 Sep 2022 21:43:20 +0300 Message-ID: <5753736.MhkbZ0Pkbq@basile.remlab.net> Organization: Remlab MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCHv3 0/12] RISC-V Vector functions for lavu float&fixed DSP X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: owib0MuCqKyU The following changes since commit d9e3cb7e73c77ccddc4d29ed5c1be3920f72c226: avfilter/vf_scale: overwrite the width and height expressions with the original values (2022-09-06 10:10:42 -0300) are available in the Git repository at: git.remlab.net:git/ffmpeg.git rvv for you to fetch changes up to: lavu/riscv: fixed vector sum-and-difference with RVV (2022-09-06 21:30:28 +0300) Changes since v2: - Add fixed butterflies (the only fixed point DSP function if !USE_FIXED). - Clean up CPU flags definition. - Move ISA extension selection to function macro. - Add const macro (currently unused). - Add checkasm support. - Use ARM-like macros for FP ABIs. This patchset is orthogonal to the RISC-V scalar patchset. They can be merged in any order. ---------------------------------------------------------------- Rémi Denis-Courmont (12): lavu/riscv: add CPU flags for the RISC-V Vector extension checkasm: register the RISC-V V subsets lavu/riscv: initial common header for assembler macros lavu/riscv: float vector-scalar multiplication with RVV lavu/riscv: float vector-vector multiplication with RVV lavu/riscv: float vector multiply-accumulate with RVV lavu/riscv: float vector multiplication-addition with RVV lavu/riscv: float vector sum-and-difference with RVV lavu/riscv: float reversed vector multiplication with RVV lavu/riscv: float vector windowed overlap/add with RVV lavu/riscv: float vector dot product with RVV lavu/riscv: fixed vector sum-and-difference with RVV libavutil/cpu.c | 15 +++ libavutil/cpu.h | 6 + libavutil/cpu_internal.h | 1 + libavutil/fixed_dsp.c | 4 +- libavutil/fixed_dsp.h | 1 + libavutil/float_dsp.c | 2 + libavutil/float_dsp.h | 1 + libavutil/riscv/Makefile | 5 + libavutil/riscv/asm.S | 58 ++++++++++ libavutil/riscv/cpu.c | 57 +++++++++ libavutil/riscv/fixed_dsp_init.c | 33 ++++++ libavutil/riscv/fixed_dsp_rvv.S | 38 ++++++ libavutil/riscv/float_dsp_init.c | 67 +++++++++++ libavutil/riscv/float_dsp_rvv.S | 243 +++++++++++++++++++++++++++++++++++++++ tests/checkasm/checkasm.c | 5 + 15 files changed, 535 insertions(+), 1 deletion(-) create mode 100644 libavutil/riscv/Makefile create mode 100644 libavutil/riscv/asm.S create mode 100644 libavutil/riscv/cpu.c create mode 100644 libavutil/riscv/fixed_dsp_init.c create mode 100644 libavutil/riscv/fixed_dsp_rvv.S create mode 100644 libavutil/riscv/float_dsp_init.c create mode 100644 libavutil/riscv/float_dsp_rvv.S