From patchwork Fri Aug 31 13:56:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shiyou Yin X-Patchwork-Id: 10194 Delivered-To: ffmpegpatchwork@gmail.com Received: by 2002:a02:12c4:0:0:0:0:0 with SMTP id 65-v6csp796371jap; Fri, 31 Aug 2018 06:56:19 -0700 (PDT) X-Google-Smtp-Source: ANB0VdbLDIA/hxXuR7TbKNquOE5h0UCFsof2wDZN2xHu46VOVWCYOjrXFMFiWxDEpcLhFs3ljFSh X-Received: by 2002:a5d:5383:: with SMTP id d3-v6mr11099239wrv.191.1535723779889; Fri, 31 Aug 2018 06:56:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535723779; cv=none; d=google.com; s=arc-20160816; b=GT7ndGDb0MCbIcPi8bdliXCjR5WAePb6h/nth6XMN3DCh3LChlLLltHptbrf+or0o5 Bdv1liCmTD2yjtnWGxeCz2bg+ymC82DA+tO84ldFkIa+v0nHKBrzDk+8Fi6sMsXexx0f gOMEiFhPVWTAT73fiTtbBp42426mYZ+9IbluFC7ghBgqZ/OxHSWJlYKYcOkK7dHQl2mF uqYbzduTaPJNhSIQ9nWJsikXTq+pq5+7262bqBX6MthcaG/Zv+Qedht631BvDtGQF8q+ zNHHmeCa61nPqoQ/SPnVj0Qd7MXXYtmAdXY/gJjHhw4yXsSzlSr6h2UGQqo8IjaH1Qn0 yCEQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:reply-to :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:message-id:date:to:from:delivered-to; bh=z+ZtV/1gOOGrmYXIIGaBeRgPNchM9IC/BUnnFSO8/4I=; b=R54YWEBiY3ylcKwVCKbYtpRsD9r8aRWPvlxBaOxd5CaD9Tm7VSNRDD3wCewrd2OHJM fkpNJ0B/1Jb+FIbbVvh2oP0Q2lhLtCPqPtnT3eYM99GGGh39xRT9bgr4AklEQtNJNxqA YuSyMyQmrtUYMbJp4+Q2e/dTm4e5f59v/Lc6cnaJA/wbHOjbAwA0euxRl1Ady20kahFh Q4A+mJe3w0rxfTGguRmJy+Xcma8zm0iIv50/JCMkIPLoI1veKW91OSUctscX4Nz1gosQ ULddrrqQ45xQf1L4ZfwbPEqLLV1a3fPCyworhbvdZhrfqOMSVRpMMYlMcBA6nMBhbH6/ FRRg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Return-Path: Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org. [79.124.17.100]) by mx.google.com with ESMTP id f2-v6si2388140wma.73.2018.08.31.06.56.19; Fri, 31 Aug 2018 06:56:19 -0700 (PDT) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 80F06689E20; Fri, 31 Aug 2018 16:56:12 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 3A87B689C7E for ; Fri, 31 Aug 2018 16:56:03 +0300 (EEST) Received: from localhost (unknown [210.45.123.188]) by mail (Coremail) with SMTP id QMiowPCxWeXhSIlbbfMHAA--.36264S3; Fri, 31 Aug 2018 21:55:45 +0800 (CST) From: Shiyou Yin To: ffmpeg-devel@ffmpeg.org Date: Fri, 31 Aug 2018 21:56:05 +0800 Message-Id: <1535723765-494-1-git-send-email-yinshiyou-hf@loongson.cn> X-Mailer: git-send-email 2.1.0 X-CM-TRANSID: QMiowPCxWeXhSIlbbfMHAA--.36264S3 X-Coremail-Antispam: 1UD129KBjvAXoWfAw47CFW7tr4xAFy8Kr48JFb_yoW5AF1fXo W5GrW8tasrJ3WxJr4kAr1UCw4FyFyUtrWUJr4fJw4akryqqr18Cr4rCw45Jr4vqw43JrW3 AF1vqF17Za1UG3y8n29KB7ZKAUJUUUUr529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUYp7kC6x804xWl14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK 8VAvwI8IcIk0rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4 AK67xGY2AK021l84ACjcxK6xIIjxv20xvE14v26r1j6r1xM28EF7xvwVC0I7IYx2IY6xkF 7I0E14v26r1j6r4UM28EF7xvwVC2z280aVAFwI0_Cr1j6rxdM28EF7xvwVC2z280aVCY1x 0267AKxVW0oVCq3wAaw2AFwI0_Jrv_JF1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG 64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_JF0_Jw1lYx0Ex4A2jsIE14v26r 4j6F4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwACjcxG0xvY0x0EwIxG rVCF72vEw4AK0wCY02Avz4vE14v_Xr4l42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7 v_Jr0_Gr1l4IxYO2xFxVAFwI0_JF0_Jw1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8G jcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1j6r15MIIYrxkI7VAKI48JMIIF0xvE2I x0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE42xK 8VAvwI8IcIk0rVW8JVW3JwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I 0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07jV9a9UUUUU= X-CM-SenderInfo: p1lq2x5l1r3gtki6z05rqj20fqof0/ Subject: [FFmpeg-devel] [PATCH v3] avcodec/mips: [loongson] reoptimize h264_chroma_mc8_mmi v2. X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches MIME-Version: 1.0 Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" Reoptimize function ff_put_h264_chroma_mc8_mmi and ff_avg_h264_chroma_mc8_mmi. Performance of h264 decoding improved about 5%(from 69fps to 73fps, tested on loongson 3A3000). --- libavcodec/mips/h264chroma_mmi.c | 744 ++++++++++++++++++++++++--------------- 1 file changed, 455 insertions(+), 289 deletions(-) diff --git a/libavcodec/mips/h264chroma_mmi.c b/libavcodec/mips/h264chroma_mmi.c index bafe0f9..91b2cc4 100644 --- a/libavcodec/mips/h264chroma_mmi.c +++ b/libavcodec/mips/h264chroma_mmi.c @@ -29,326 +29,322 @@ void ff_put_h264_chroma_mc8_mmi(uint8_t *dst, uint8_t *src, ptrdiff_t stride, int h, int x, int y) { - const int A = (8 - x) * (8 - y); - const int B = x * (8 - y); - const int C = (8 - x) * y; - const int D = x * y; - const int E = B + C; + int A = 64, B, C, D, E; double ftmp[10]; uint64_t tmp[1]; - mips_reg addr[1]; - DECLARE_VAR_ALL64; - if (D) { + if (!(x || y)) { + /* x=0, y=0, A=64 */ __asm__ volatile ( - "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" - "dli %[tmp0], 0x06 \n\t" - "pshufh %[A], %[A], %[ftmp0] \n\t" - "pshufh %[B], %[B], %[ftmp0] \n\t" - "mtc1 %[tmp0], %[ftmp9] \n\t" - "pshufh %[C], %[C], %[ftmp0] \n\t" - "pshufh %[D], %[D], %[ftmp0] \n\t" + "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" + "dli %[tmp0], 0x06 \n\t" + "mtc1 %[tmp0], %[ftmp4] \n\t" - "1: \n\t" - PTR_ADDU "%[addr0], %[src], %[stride] \n\t" + "1: \n\t" MMI_ULDC1(%[ftmp1], %[src], 0x00) - MMI_ULDC1(%[ftmp2], %[src], 0x01) - MMI_ULDC1(%[ftmp3], %[addr0], 0x00) - MMI_ULDC1(%[ftmp4], %[addr0], 0x01) - - "punpcklbh %[ftmp5], %[ftmp1], %[ftmp0] \n\t" - "punpckhbh %[ftmp6], %[ftmp1], %[ftmp0] \n\t" - "punpcklbh %[ftmp7], %[ftmp2], %[ftmp0] \n\t" - "punpckhbh %[ftmp8], %[ftmp2], %[ftmp0] \n\t" - "pmullh %[ftmp5], %[ftmp5], %[A] \n\t" - "pmullh %[ftmp7], %[ftmp7], %[B] \n\t" - "paddh %[ftmp1], %[ftmp5], %[ftmp7] \n\t" - "pmullh %[ftmp6], %[ftmp6], %[A] \n\t" - "pmullh %[ftmp8], %[ftmp8], %[B] \n\t" - "paddh %[ftmp2], %[ftmp6], %[ftmp8] \n\t" - - "punpcklbh %[ftmp5], %[ftmp3], %[ftmp0] \n\t" - "punpckhbh %[ftmp6], %[ftmp3], %[ftmp0] \n\t" - "punpcklbh %[ftmp7], %[ftmp4], %[ftmp0] \n\t" - "punpckhbh %[ftmp8], %[ftmp4], %[ftmp0] \n\t" - "pmullh %[ftmp5], %[ftmp5], %[C] \n\t" - "pmullh %[ftmp7], %[ftmp7], %[D] \n\t" - "paddh %[ftmp3], %[ftmp5], %[ftmp7] \n\t" - "pmullh %[ftmp6], %[ftmp6], %[C] \n\t" - "pmullh %[ftmp8], %[ftmp8], %[D] \n\t" - "paddh %[ftmp4], %[ftmp6], %[ftmp8] \n\t" - - "paddh %[ftmp1], %[ftmp1], %[ftmp3] \n\t" - "paddh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" - "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" - "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" - "psrlh %[ftmp1], %[ftmp1], %[ftmp9] \n\t" - "psrlh %[ftmp2], %[ftmp2], %[ftmp9] \n\t" - "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - "addi %[h], %[h], -0x01 \n\t" + "addi %[h], %[h], -0x04 \n\t" + PTR_ADDU "%[src], %[src], %[stride] \n\t" + MMI_ULDC1(%[ftmp5], %[src], 0x00) + PTR_ADDU "%[src], %[src], %[stride] \n\t" + MMI_ULDC1(%[ftmp6], %[src], 0x00) + PTR_ADDU "%[src], %[src], %[stride] \n\t" + MMI_ULDC1(%[ftmp7], %[src], 0x00) + + "punpcklbh %[ftmp2], %[ftmp1], %[ftmp0] \n\t" + "punpckhbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" + "psllh %[ftmp1], %[ftmp2], %[ftmp4] \n\t" + "psllh %[ftmp2], %[ftmp3], %[ftmp4] \n\t" + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp4] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" MMI_SDC1(%[ftmp1], %[dst], 0x00) - PTR_ADDU "%[src], %[src], %[stride] \n\t" - PTR_ADDU "%[dst], %[dst], %[stride] \n\t" - "bnez %[h], 1b \n\t" - : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), - [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), - [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), - [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), - [ftmp8]"=&f"(ftmp[8]), [ftmp9]"=&f"(ftmp[9]), - [tmp0]"=&r"(tmp[0]), - RESTRICT_ASM_ALL64 - [addr0]"=&r"(addr[0]), - [dst]"+&r"(dst), [src]"+&r"(src), - [h]"+&r"(h) - : [stride]"r"((mips_reg)stride),[ff_pw_32]"f"(ff_pw_32), - [A]"f"(A), [B]"f"(B), - [C]"f"(C), [D]"f"(D) - : "memory" - ); - } else if (E) { - const int step = C ? stride : 1; - - __asm__ volatile ( - "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" - "dli %[tmp0], 0x06 \n\t" - "pshufh %[A], %[A], %[ftmp0] \n\t" - "pshufh %[E], %[E], %[ftmp0] \n\t" - "mtc1 %[tmp0], %[ftmp7] \n\t" - - "1: \n\t" - PTR_ADDU "%[addr0], %[src], %[step] \n\t" - MMI_ULDC1(%[ftmp1], %[src], 0x00) - MMI_ULDC1(%[ftmp2], %[addr0], 0x00) - "punpcklbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" - "punpckhbh %[ftmp4], %[ftmp1], %[ftmp0] \n\t" - "punpcklbh %[ftmp5], %[ftmp2], %[ftmp0] \n\t" - "punpckhbh %[ftmp6], %[ftmp2], %[ftmp0] \n\t" - "pmullh %[ftmp3], %[ftmp3], %[A] \n\t" - "pmullh %[ftmp5], %[ftmp5], %[E] \n\t" - "paddh %[ftmp1], %[ftmp3], %[ftmp5] \n\t" - "pmullh %[ftmp4], %[ftmp4], %[A] \n\t" - "pmullh %[ftmp6], %[ftmp6], %[E] \n\t" - "paddh %[ftmp2], %[ftmp4], %[ftmp6] \n\t" - - "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" - "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" - "psrlh %[ftmp1], %[ftmp1], %[ftmp7] \n\t" - "psrlh %[ftmp2], %[ftmp2], %[ftmp7] \n\t" - "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - "addi %[h], %[h], -0x01 \n\t" + "punpcklbh %[ftmp2], %[ftmp5], %[ftmp0] \n\t" + "punpckhbh %[ftmp3], %[ftmp5], %[ftmp0] \n\t" + "psllh %[ftmp1], %[ftmp2], %[ftmp4] \n\t" + "psllh %[ftmp2], %[ftmp3], %[ftmp4] \n\t" + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp4] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" MMI_SDC1(%[ftmp1], %[dst], 0x00) - PTR_ADDU "%[src], %[src], %[stride] \n\t" - PTR_ADDU "%[dst], %[dst], %[stride] \n\t" - "bnez %[h], 1b \n\t" - : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), - [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), - [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), - [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), - [tmp0]"=&r"(tmp[0]), - RESTRICT_ASM_ALL64 - [addr0]"=&r"(addr[0]), - [dst]"+&r"(dst), [src]"+&r"(src), - [h]"+&r"(h) - : [stride]"r"((mips_reg)stride),[step]"r"((mips_reg)step), - [ff_pw_32]"f"(ff_pw_32), - [A]"f"(A), [E]"f"(E) - : "memory" - ); - } else { - __asm__ volatile ( - "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" - "dli %[tmp0], 0x06 \n\t" - "pshufh %[A], %[A], %[ftmp0] \n\t" - "mtc1 %[tmp0], %[ftmp4] \n\t" - "1: \n\t" - MMI_ULDC1(%[ftmp1], %[src], 0x00) - "punpcklbh %[ftmp2], %[ftmp1], %[ftmp0] \n\t" - "punpckhbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" - "pmullh %[ftmp1], %[ftmp2], %[A] \n\t" - "pmullh %[ftmp2], %[ftmp3], %[A] \n\t" - "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" - "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" - "psrlh %[ftmp1], %[ftmp1], %[ftmp4] \n\t" - "psrlh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" - "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - PTR_ADDU "%[src], %[src], %[stride] \n\t" + "punpcklbh %[ftmp2], %[ftmp6], %[ftmp0] \n\t" + "punpckhbh %[ftmp3], %[ftmp6], %[ftmp0] \n\t" + "psllh %[ftmp1], %[ftmp2], %[ftmp4] \n\t" + "psllh %[ftmp2], %[ftmp3], %[ftmp4] \n\t" + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp4] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" MMI_SDC1(%[ftmp1], %[dst], 0x00) - PTR_ADDU "%[dst], %[dst], %[stride] \n\t" - MMI_ULDC1(%[ftmp1], %[src], 0x00) - "punpcklbh %[ftmp2], %[ftmp1], %[ftmp0] \n\t" - "punpckhbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" - "pmullh %[ftmp1], %[ftmp2], %[A] \n\t" - "pmullh %[ftmp2], %[ftmp3], %[A] \n\t" - "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" - "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" - "psrlh %[ftmp1], %[ftmp1], %[ftmp4] \n\t" - "psrlh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" - "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - "addi %[h], %[h], -0x02 \n\t" + "punpcklbh %[ftmp2], %[ftmp7], %[ftmp0] \n\t" + "punpckhbh %[ftmp3], %[ftmp7], %[ftmp0] \n\t" + "psllh %[ftmp1], %[ftmp2], %[ftmp4] \n\t" + "psllh %[ftmp2], %[ftmp3], %[ftmp4] \n\t" + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp4] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" MMI_SDC1(%[ftmp1], %[dst], 0x00) - PTR_ADDU "%[src], %[src], %[stride] \n\t" - PTR_ADDU "%[dst], %[dst], %[stride] \n\t" - "bnez %[h], 1b \n\t" + PTR_ADDU "%[src], %[src], %[stride] \n\t" + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + "bnez %[h], 1b \n\t" : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), - [ftmp4]"=&f"(ftmp[4]), + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), + [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), [tmp0]"=&r"(tmp[0]), - RESTRICT_ASM_ALL64 [dst]"+&r"(dst), [src]"+&r"(src), [h]"+&r"(h) - : [stride]"r"((mips_reg)stride),[ff_pw_32]"f"(ff_pw_32), - [A]"f"(A) + : [stride]"r"((mips_reg)stride),[ff_pw_32]"f"(ff_pw_32) : "memory" ); + } else { + if (x && y) { + /* x!=0, y!=0 */ + D = x * y; + B = (x << 3) - D; + C = (y << 3) - D; + A = 64 - D - B - C; + + __asm__ volatile ( + "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" + "dli %[tmp0], 0x06 \n\t" + "pshufh %[A], %[A], %[ftmp0] \n\t" + "pshufh %[B], %[B], %[ftmp0] \n\t" + "mtc1 %[tmp0], %[ftmp9] \n\t" + "pshufh %[C], %[C], %[ftmp0] \n\t" + "pshufh %[D], %[D], %[ftmp0] \n\t" + + "1: \n\t" + MMI_ULDC1(%[ftmp1], %[src], 0x00) + MMI_ULDC1(%[ftmp2], %[src], 0x01) + PTR_ADDU "%[src], %[src], %[stride] \n\t" + MMI_ULDC1(%[ftmp3], %[src], 0x00) + MMI_ULDC1(%[ftmp4], %[src], 0x01) + "addi %[h], %[h], -0x02 \n\t" + + "punpcklbh %[ftmp5], %[ftmp1], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp1], %[ftmp0] \n\t" + "punpcklbh %[ftmp7], %[ftmp2], %[ftmp0] \n\t" + "punpckhbh %[ftmp8], %[ftmp2], %[ftmp0] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[A] \n\t" + "pmullh %[ftmp7], %[ftmp7], %[B] \n\t" + "paddh %[ftmp1], %[ftmp5], %[ftmp7] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[A] \n\t" + "pmullh %[ftmp8], %[ftmp8], %[B] \n\t" + "paddh %[ftmp2], %[ftmp6], %[ftmp8] \n\t" + + "punpcklbh %[ftmp5], %[ftmp3], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp3], %[ftmp0] \n\t" + "punpcklbh %[ftmp7], %[ftmp4], %[ftmp0] \n\t" + "punpckhbh %[ftmp8], %[ftmp4], %[ftmp0] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[C] \n\t" + "pmullh %[ftmp7], %[ftmp7], %[D] \n\t" + "paddh %[ftmp3], %[ftmp5], %[ftmp7] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[C] \n\t" + "pmullh %[ftmp8], %[ftmp8], %[D] \n\t" + "paddh %[ftmp4], %[ftmp6], %[ftmp8] \n\t" + + "paddh %[ftmp1], %[ftmp1], %[ftmp3] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp9] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp9] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_SDC1(%[ftmp1], %[dst], 0x00) + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + + MMI_ULDC1(%[ftmp1], %[src], 0x00) + MMI_ULDC1(%[ftmp2], %[src], 0x01) + PTR_ADDU "%[src], %[src], %[stride] \n\t" + MMI_ULDC1(%[ftmp3], %[src], 0x00) + MMI_ULDC1(%[ftmp4], %[src], 0x01) + + "punpcklbh %[ftmp5], %[ftmp1], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp1], %[ftmp0] \n\t" + "punpcklbh %[ftmp7], %[ftmp2], %[ftmp0] \n\t" + "punpckhbh %[ftmp8], %[ftmp2], %[ftmp0] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[A] \n\t" + "pmullh %[ftmp7], %[ftmp7], %[B] \n\t" + "paddh %[ftmp1], %[ftmp5], %[ftmp7] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[A] \n\t" + "pmullh %[ftmp8], %[ftmp8], %[B] \n\t" + "paddh %[ftmp2], %[ftmp6], %[ftmp8] \n\t" + + "punpcklbh %[ftmp5], %[ftmp3], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp3], %[ftmp0] \n\t" + "punpcklbh %[ftmp7], %[ftmp4], %[ftmp0] \n\t" + "punpckhbh %[ftmp8], %[ftmp4], %[ftmp0] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[C] \n\t" + "pmullh %[ftmp7], %[ftmp7], %[D] \n\t" + "paddh %[ftmp3], %[ftmp5], %[ftmp7] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[C] \n\t" + "pmullh %[ftmp8], %[ftmp8], %[D] \n\t" + "paddh %[ftmp4], %[ftmp6], %[ftmp8] \n\t" + + "paddh %[ftmp1], %[ftmp1], %[ftmp3] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp9] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp9] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_SDC1(%[ftmp1], %[dst], 0x00) + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + + "bnez %[h], 1b \n\t" + : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), + [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), + [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), + [ftmp8]"=&f"(ftmp[8]), [ftmp9]"=&f"(ftmp[9]), + [tmp0]"=&r"(tmp[0]), + [dst]"+&r"(dst), [src]"+&r"(src), + [h]"+&r"(h) + : [stride]"r"((mips_reg)stride),[ff_pw_32]"f"(ff_pw_32), + [A]"f"(A), [B]"f"(B), + [C]"f"(C), [D]"f"(D) + : "memory" + ); + } else { + if (x) { + /* x!=0, y==0 */ + E = x << 3; + A = 64 - E; + + __asm__ volatile ( + "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" + "dli %[tmp0], 0x06 \n\t" + "pshufh %[A], %[A], %[ftmp0] \n\t" + "pshufh %[E], %[E], %[ftmp0] \n\t" + "mtc1 %[tmp0], %[ftmp7] \n\t" + + "1: \n\t" + MMI_ULDC1(%[ftmp1], %[src], 0x00) + MMI_ULDC1(%[ftmp2], %[src], 0x01) + "addi %[h], %[h], -0x01 \n\t" + PTR_ADDU "%[src], %[src], %[stride] \n\t" + + "punpcklbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" + "punpckhbh %[ftmp4], %[ftmp1], %[ftmp0] \n\t" + "punpcklbh %[ftmp5], %[ftmp2], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp2], %[ftmp0] \n\t" + "pmullh %[ftmp3], %[ftmp3], %[A] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[E] \n\t" + "paddh %[ftmp1], %[ftmp3], %[ftmp5] \n\t" + "pmullh %[ftmp4], %[ftmp4], %[A] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[E] \n\t" + "paddh %[ftmp2], %[ftmp4], %[ftmp6] \n\t" + + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp7] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp7] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_SDC1(%[ftmp1], %[dst], 0x00) + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + "bnez %[h], 1b \n\t" + : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), + [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), + [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), + [tmp0]"=&r"(tmp[0]), + [dst]"+&r"(dst), [src]"+&r"(src), + [h]"+&r"(h) + : [stride]"r"((mips_reg)stride), + [ff_pw_32]"f"(ff_pw_32), + [A]"f"(A), [E]"f"(E) + : "memory" + ); + } else { + /* x==0, y!=0 */ + E = y << 3; + A = 64 - E; + + __asm__ volatile ( + "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" + "dli %[tmp0], 0x06 \n\t" + "pshufh %[A], %[A], %[ftmp0] \n\t" + "pshufh %[E], %[E], %[ftmp0] \n\t" + "mtc1 %[tmp0], %[ftmp7] \n\t" + + "1: \n\t" + MMI_ULDC1(%[ftmp1], %[src], 0x00) + PTR_ADDU "%[src], %[src], %[stride] \n\t" + MMI_ULDC1(%[ftmp2], %[src], 0x00) + "addi %[h], %[h], -0x01 \n\t" + + "punpcklbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" + "punpckhbh %[ftmp4], %[ftmp1], %[ftmp0] \n\t" + "punpcklbh %[ftmp5], %[ftmp2], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp2], %[ftmp0] \n\t" + "pmullh %[ftmp3], %[ftmp3], %[A] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[E] \n\t" + "paddh %[ftmp1], %[ftmp3], %[ftmp5] \n\t" + "pmullh %[ftmp4], %[ftmp4], %[A] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[E] \n\t" + "paddh %[ftmp2], %[ftmp4], %[ftmp6] \n\t" + + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp7] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp7] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_SDC1(%[ftmp1], %[dst], 0x00) + + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + "bnez %[h], 1b \n\t" + : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), + [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), + [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), + [tmp0]"=&r"(tmp[0]), + [dst]"+&r"(dst), [src]"+&r"(src), + [h]"+&r"(h) + : [stride]"r"((mips_reg)stride), + [ff_pw_32]"f"(ff_pw_32), + [A]"f"(A), [E]"f"(E) + : "memory" + ); + } + } } } void ff_avg_h264_chroma_mc8_mmi(uint8_t *dst, uint8_t *src, ptrdiff_t stride, int h, int x, int y) { - const int A = (8 - x) * (8 - y); - const int B = x * (8 - y); - const int C = (8 - x) * y; - const int D = x * y; - const int E = B + C; + int A = 64, B, C, D, E; double ftmp[10]; uint64_t tmp[1]; - mips_reg addr[1]; - DECLARE_VAR_ALL64; - if (D) { + if(!(x || y)){ + /* x=0, y=0, A=64 */ __asm__ volatile ( "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" "dli %[tmp0], 0x06 \n\t" "pshufh %[A], %[A], %[ftmp0] \n\t" - "pshufh %[B], %[B], %[ftmp0] \n\t" - "mtc1 %[tmp0], %[ftmp9] \n\t" - "pshufh %[C], %[C], %[ftmp0] \n\t" - "pshufh %[D], %[D], %[ftmp0] \n\t" + "mtc1 %[tmp0], %[ftmp4] \n\t" "1: \n\t" - PTR_ADDU "%[addr0], %[src], %[stride] \n\t" MMI_ULDC1(%[ftmp1], %[src], 0x00) - MMI_ULDC1(%[ftmp2], %[src], 0x01) - MMI_ULDC1(%[ftmp3], %[addr0], 0x00) - MMI_ULDC1(%[ftmp4], %[addr0], 0x01) - - "punpcklbh %[ftmp5], %[ftmp1], %[ftmp0] \n\t" - "punpckhbh %[ftmp6], %[ftmp1], %[ftmp0] \n\t" - "punpcklbh %[ftmp7], %[ftmp2], %[ftmp0] \n\t" - "punpckhbh %[ftmp8], %[ftmp2], %[ftmp0] \n\t" - "pmullh %[ftmp5], %[ftmp5], %[A] \n\t" - "pmullh %[ftmp7], %[ftmp7], %[B] \n\t" - "paddh %[ftmp1], %[ftmp5], %[ftmp7] \n\t" - "pmullh %[ftmp6], %[ftmp6], %[A] \n\t" - "pmullh %[ftmp8], %[ftmp8], %[B] \n\t" - "paddh %[ftmp2], %[ftmp6], %[ftmp8] \n\t" - - "punpcklbh %[ftmp5], %[ftmp3], %[ftmp0] \n\t" - "punpckhbh %[ftmp6], %[ftmp3], %[ftmp0] \n\t" - "punpcklbh %[ftmp7], %[ftmp4], %[ftmp0] \n\t" - "punpckhbh %[ftmp8], %[ftmp4], %[ftmp0] \n\t" - "pmullh %[ftmp5], %[ftmp5], %[C] \n\t" - "pmullh %[ftmp7], %[ftmp7], %[D] \n\t" - "paddh %[ftmp3], %[ftmp5], %[ftmp7] \n\t" - "pmullh %[ftmp6], %[ftmp6], %[C] \n\t" - "pmullh %[ftmp8], %[ftmp8], %[D] \n\t" - "paddh %[ftmp4], %[ftmp6], %[ftmp8] \n\t" - - "paddh %[ftmp1], %[ftmp1], %[ftmp3] \n\t" - "paddh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" - "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" - "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" - "psrlh %[ftmp1], %[ftmp1], %[ftmp9] \n\t" - "psrlh %[ftmp2], %[ftmp2], %[ftmp9] \n\t" - "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - MMI_LDC1(%[ftmp2], %[dst], 0x00) - "pavgb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - "addi %[h], %[h], -0x01 \n\t" - MMI_SDC1(%[ftmp1], %[dst], 0x00) - PTR_ADDU "%[dst], %[dst], %[stride] \n\t" PTR_ADDU "%[src], %[src], %[stride] \n\t" - "bnez %[h], 1b \n\t" - : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), - [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), - [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), - [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), - [ftmp8]"=&f"(ftmp[8]), [ftmp9]"=&f"(ftmp[9]), - [tmp0]"=&r"(tmp[0]), - RESTRICT_ASM_ALL64 - [addr0]"=&r"(addr[0]), - [dst]"+&r"(dst), [src]"+&r"(src), - [h]"+&r"(h) - : [stride]"r"((mips_reg)stride),[ff_pw_32]"f"(ff_pw_32), - [A]"f"(A), [B]"f"(B), - [C]"f"(C), [D]"f"(D) - : "memory" - ); - } else if (E) { - const int step = C ? stride : 1; - - __asm__ volatile ( - "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" - "dli %[tmp0], 0x06 \n\t" - "pshufh %[A], %[A], %[ftmp0] \n\t" - "pshufh %[E], %[E], %[ftmp0] \n\t" - "mtc1 %[tmp0], %[ftmp7] \n\t" - - "1: \n\t" - PTR_ADDU "%[addr0], %[src], %[step] \n\t" - MMI_ULDC1(%[ftmp1], %[src], 0x00) - MMI_ULDC1(%[ftmp2], %[addr0], 0x00) - - "punpcklbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" - "punpckhbh %[ftmp4], %[ftmp1], %[ftmp0] \n\t" - "punpcklbh %[ftmp5], %[ftmp2], %[ftmp0] \n\t" - "punpckhbh %[ftmp6], %[ftmp2], %[ftmp0] \n\t" - "pmullh %[ftmp3], %[ftmp3], %[A] \n\t" - "pmullh %[ftmp5], %[ftmp5], %[E] \n\t" - "paddh %[ftmp1], %[ftmp3], %[ftmp5] \n\t" - "pmullh %[ftmp4], %[ftmp4], %[A] \n\t" - "pmullh %[ftmp6], %[ftmp6], %[E] \n\t" - "paddh %[ftmp2], %[ftmp4], %[ftmp6] \n\t" - - "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" - "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" - "psrlh %[ftmp1], %[ftmp1], %[ftmp7] \n\t" - "psrlh %[ftmp2], %[ftmp2], %[ftmp7] \n\t" - "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - MMI_LDC1(%[ftmp2], %[dst], 0x00) - "pavgb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - "addi %[h], %[h], -0x01 \n\t" - MMI_SDC1(%[ftmp1], %[dst], 0x00) + MMI_ULDC1(%[ftmp5], %[src], 0x00) PTR_ADDU "%[src], %[src], %[stride] \n\t" - PTR_ADDU "%[dst], %[dst], %[stride] \n\t" - "bnez %[h], 1b \n\t" - : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), - [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), - [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), - [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), - [tmp0]"=&r"(tmp[0]), - RESTRICT_ASM_ALL64 - [addr0]"=&r"(addr[0]), - [dst]"+&r"(dst), [src]"+&r"(src), - [h]"+&r"(h) - : [stride]"r"((mips_reg)stride),[step]"r"((mips_reg)step), - [ff_pw_32]"f"(ff_pw_32), - [A]"f"(A), [E]"f"(E) - : "memory" - ); - } else { - __asm__ volatile ( - "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" - "dli %[tmp0], 0x06 \n\t" - "pshufh %[A], %[A], %[ftmp0] \n\t" - "mtc1 %[tmp0], %[ftmp4] \n\t" - "1: \n\t" - MMI_ULDC1(%[ftmp1], %[src], 0x00) "punpcklbh %[ftmp2], %[ftmp1], %[ftmp0] \n\t" "punpckhbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" "pmullh %[ftmp1], %[ftmp2], %[A] \n\t" @@ -360,13 +356,11 @@ void ff_avg_h264_chroma_mc8_mmi(uint8_t *dst, uint8_t *src, ptrdiff_t stride, "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" MMI_LDC1(%[ftmp2], %[dst], 0x00) "pavgb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - PTR_ADDU "%[src], %[src], %[stride] \n\t" MMI_SDC1(%[ftmp1], %[dst], 0x00) PTR_ADDU "%[dst], %[dst], %[stride] \n\t" - MMI_ULDC1(%[ftmp1], %[src], 0x00) - "punpcklbh %[ftmp2], %[ftmp1], %[ftmp0] \n\t" - "punpckhbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" + "punpcklbh %[ftmp2], %[ftmp5], %[ftmp0] \n\t" + "punpckhbh %[ftmp3], %[ftmp5], %[ftmp0] \n\t" "pmullh %[ftmp1], %[ftmp2], %[A] \n\t" "pmullh %[ftmp2], %[ftmp3], %[A] \n\t" "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" @@ -376,23 +370,195 @@ void ff_avg_h264_chroma_mc8_mmi(uint8_t *dst, uint8_t *src, ptrdiff_t stride, "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" MMI_LDC1(%[ftmp2], %[dst], 0x00) "pavgb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" - "addi %[h], %[h], -0x02 \n\t" MMI_SDC1(%[ftmp1], %[dst], 0x00) - - PTR_ADDU "%[src], %[src], %[stride] \n\t" PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + + "addi %[h], %[h], -0x02 \n\t" "bnez %[h], 1b \n\t" : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), - [ftmp4]"=&f"(ftmp[4]), + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), [tmp0]"=&r"(tmp[0]), - RESTRICT_ASM_ALL64 [dst]"+&r"(dst), [src]"+&r"(src), [h]"+&r"(h) : [stride]"r"((mips_reg)stride),[ff_pw_32]"f"(ff_pw_32), [A]"f"(A) : "memory" ); + } else { + if(x && y) { + /* x!=0, y!=0 */ + D = x * y; + B = (x << 3) - D; + C = (y << 3) - D; + A = 64 - D - B - C; + __asm__ volatile ( + "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" + "dli %[tmp0], 0x06 \n\t" + "pshufh %[A], %[A], %[ftmp0] \n\t" + "pshufh %[B], %[B], %[ftmp0] \n\t" + "mtc1 %[tmp0], %[ftmp9] \n\t" + "pshufh %[C], %[C], %[ftmp0] \n\t" + "pshufh %[D], %[D], %[ftmp0] \n\t" + + "1: \n\t" + MMI_ULDC1(%[ftmp1], %[src], 0x00) + MMI_ULDC1(%[ftmp2], %[src], 0x01) + PTR_ADDU "%[src], %[src], %[stride] \n\t" + MMI_ULDC1(%[ftmp3], %[src], 0x00) + MMI_ULDC1(%[ftmp4], %[src], 0x01) + "addi %[h], %[h], -0x01 \n\t" + + "punpcklbh %[ftmp5], %[ftmp1], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp1], %[ftmp0] \n\t" + "punpcklbh %[ftmp7], %[ftmp2], %[ftmp0] \n\t" + "punpckhbh %[ftmp8], %[ftmp2], %[ftmp0] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[A] \n\t" + "pmullh %[ftmp7], %[ftmp7], %[B] \n\t" + "paddh %[ftmp1], %[ftmp5], %[ftmp7] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[A] \n\t" + "pmullh %[ftmp8], %[ftmp8], %[B] \n\t" + "paddh %[ftmp2], %[ftmp6], %[ftmp8] \n\t" + + "punpcklbh %[ftmp5], %[ftmp3], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp3], %[ftmp0] \n\t" + "punpcklbh %[ftmp7], %[ftmp4], %[ftmp0] \n\t" + "punpckhbh %[ftmp8], %[ftmp4], %[ftmp0] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[C] \n\t" + "pmullh %[ftmp7], %[ftmp7], %[D] \n\t" + "paddh %[ftmp3], %[ftmp5], %[ftmp7] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[C] \n\t" + "pmullh %[ftmp8], %[ftmp8], %[D] \n\t" + "paddh %[ftmp4], %[ftmp6], %[ftmp8] \n\t" + + "paddh %[ftmp1], %[ftmp1], %[ftmp3] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ftmp4] \n\t" + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp9] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp9] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_LDC1(%[ftmp2], %[dst], 0x00) + "pavgb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_SDC1(%[ftmp1], %[dst], 0x00) + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + "bnez %[h], 1b \n\t" + : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), + [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), + [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), + [ftmp8]"=&f"(ftmp[8]), [ftmp9]"=&f"(ftmp[9]), + [tmp0]"=&r"(tmp[0]), + [dst]"+&r"(dst), [src]"+&r"(src), + [h]"+&r"(h) + : [stride]"r"((mips_reg)stride),[ff_pw_32]"f"(ff_pw_32), + [A]"f"(A), [B]"f"(B), + [C]"f"(C), [D]"f"(D) + : "memory" + ); + } else { + if(x) { + /* x!=0, y==0 */ + E = x << 3; + A = 64 - E; + __asm__ volatile ( + "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" + "dli %[tmp0], 0x06 \n\t" + "pshufh %[A], %[A], %[ftmp0] \n\t" + "pshufh %[E], %[E], %[ftmp0] \n\t" + "mtc1 %[tmp0], %[ftmp7] \n\t" + + "1: \n\t" + MMI_ULDC1(%[ftmp1], %[src], 0x00) + MMI_ULDC1(%[ftmp2], %[src], 0x01) + PTR_ADDU "%[src], %[src], %[stride] \n\t" + "addi %[h], %[h], -0x01 \n\t" + + "punpcklbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" + "punpckhbh %[ftmp4], %[ftmp1], %[ftmp0] \n\t" + "punpcklbh %[ftmp5], %[ftmp2], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp2], %[ftmp0] \n\t" + "pmullh %[ftmp3], %[ftmp3], %[A] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[E] \n\t" + "paddh %[ftmp1], %[ftmp3], %[ftmp5] \n\t" + "pmullh %[ftmp4], %[ftmp4], %[A] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[E] \n\t" + "paddh %[ftmp2], %[ftmp4], %[ftmp6] \n\t" + + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp7] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp7] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_LDC1(%[ftmp2], %[dst], 0x00) + "pavgb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_SDC1(%[ftmp1], %[dst], 0x00) + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + "bnez %[h], 1b \n\t" + : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), + [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), + [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), + [tmp0]"=&r"(tmp[0]), + [dst]"+&r"(dst), [src]"+&r"(src), + [h]"+&r"(h) + : [stride]"r"((mips_reg)stride), + [ff_pw_32]"f"(ff_pw_32), + [A]"f"(A), [E]"f"(E) + : "memory" + ); + } else { + /* x==0, y!=0 */ + E = y << 3; + A = 64 - E; + __asm__ volatile ( + "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t" + "dli %[tmp0], 0x06 \n\t" + "pshufh %[A], %[A], %[ftmp0] \n\t" + "pshufh %[E], %[E], %[ftmp0] \n\t" + "mtc1 %[tmp0], %[ftmp7] \n\t" + + "1: \n\t" + MMI_ULDC1(%[ftmp1], %[src], 0x00) + PTR_ADDU "%[src], %[src], %[stride] \n\t" + MMI_ULDC1(%[ftmp2], %[src], 0x00) + "addi %[h], %[h], -0x01 \n\t" + + "punpcklbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t" + "punpckhbh %[ftmp4], %[ftmp1], %[ftmp0] \n\t" + "punpcklbh %[ftmp5], %[ftmp2], %[ftmp0] \n\t" + "punpckhbh %[ftmp6], %[ftmp2], %[ftmp0] \n\t" + "pmullh %[ftmp3], %[ftmp3], %[A] \n\t" + "pmullh %[ftmp5], %[ftmp5], %[E] \n\t" + "paddh %[ftmp1], %[ftmp3], %[ftmp5] \n\t" + "pmullh %[ftmp4], %[ftmp4], %[A] \n\t" + "pmullh %[ftmp6], %[ftmp6], %[E] \n\t" + "paddh %[ftmp2], %[ftmp4], %[ftmp6] \n\t" + + "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t" + "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t" + "psrlh %[ftmp1], %[ftmp1], %[ftmp7] \n\t" + "psrlh %[ftmp2], %[ftmp2], %[ftmp7] \n\t" + "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_LDC1(%[ftmp2], %[dst], 0x00) + "pavgb %[ftmp1], %[ftmp1], %[ftmp2] \n\t" + MMI_SDC1(%[ftmp1], %[dst], 0x00) + PTR_ADDU "%[dst], %[dst], %[stride] \n\t" + "bnez %[h], 1b \n\t" + : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]), + [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]), + [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]), + [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]), + [tmp0]"=&r"(tmp[0]), + [dst]"+&r"(dst), [src]"+&r"(src), + [h]"+&r"(h) + : [stride]"r"((mips_reg)stride), + [ff_pw_32]"f"(ff_pw_32), + [A]"f"(A), [E]"f"(E) + : "memory" + ); + } + } } }