From patchwork Thu Mar 5 07:41:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Fu, Linjie" X-Patchwork-Id: 18042 Return-Path: X-Original-To: patchwork@ffaux-bg.ffmpeg.org Delivered-To: patchwork@ffaux-bg.ffmpeg.org Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org [79.124.17.100]) by ffaux.localdomain (Postfix) with ESMTP id 0AE264491C4 for ; Thu, 5 Mar 2020 09:45:26 +0200 (EET) Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id DE34C689F3F; Thu, 5 Mar 2020 09:45:25 +0200 (EET) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTPS id 233FF688184 for ; Thu, 5 Mar 2020 09:45:18 +0200 (EET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Mar 2020 23:45:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,517,1574150400"; d="scan'208";a="259102035" Received: from icl-dev.sh.intel.com ([10.239.158.73]) by orsmga002.jf.intel.com with ESMTP; 04 Mar 2020 23:45:16 -0800 From: Linjie Fu To: ffmpeg-devel@ffmpeg.org Date: Thu, 5 Mar 2020 15:41:00 +0800 Message-Id: <1583394060-19663-1-git-send-email-linjie.fu@intel.com> X-Mailer: git-send-email 2.7.4 Subject: [FFmpeg-devel] [PATCH, RFC] lavc/vaapi_encode_h265: add support for low power mode for HEVC encode X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Cc: Linjie Fu MIME-Version: 1.0 Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" Enable hevc_vaapi vdenc: - media-driver require CTU size must be set as 64x64 at low power mode - cu_qp_delta_enabled_flag should be enabled for low power mode - diff_cu_qp_delta_depth == log2_diff_max_min_luma_coding_block_size - low delay B to replace P frame - same ref_pic_list0/ref_pic_list1 Signed-off-by: Linjie Fu --- This should be rebased after the encoding query is supported in [1] and low delay B support [2] for HEVC in media driver. Sent out and request for comments. [1] https://patchwork.ffmpeg.org/project/ffmpeg/patch/20200305002528.11418-3-sw@jkqxz.net/ [2] https://github.com/intel/libva/commit/f094de317b4f498b57d47d8b0823a2a24cb125e1 libavcodec/vaapi_encode_h265.c | 34 ++++++++++++++++++++++++++++------ 1 file changed, 28 insertions(+), 6 deletions(-) diff --git a/libavcodec/vaapi_encode_h265.c b/libavcodec/vaapi_encode_h265.c index 538862a..12f0e6f 100644 --- a/libavcodec/vaapi_encode_h265.c +++ b/libavcodec/vaapi_encode_h265.c @@ -437,9 +437,12 @@ static int vaapi_encode_h265_init_sequence_params(AVCodecContext *avctx) // These have to come from the capabilities of the encoder. We have no // way to query them, so just hardcode parameters which work on the Intel // driver. - // CTB size from 8x8 to 32x32. + // CTB size from 8x8 to 32x32. (64x64 when using low power mode for hw limitation) sps->log2_min_luma_coding_block_size_minus3 = 0; - sps->log2_diff_max_min_luma_coding_block_size = 2; + if (ctx->low_power) + sps->log2_diff_max_min_luma_coding_block_size = 3; + else + sps->log2_diff_max_min_luma_coding_block_size = 2; // Transform size from 4x4 to 32x32. sps->log2_min_luma_transform_block_size_minus2 = 0; sps->log2_diff_max_min_luma_transform_block_size = 3; @@ -553,8 +556,10 @@ static int vaapi_encode_h265_init_sequence_params(AVCodecContext *avctx) pps->init_qp_minus26 = priv->fixed_qp_idr - 26; - pps->cu_qp_delta_enabled_flag = (ctx->va_rc_mode != VA_RC_CQP); - pps->diff_cu_qp_delta_depth = 0; + // driver requires enablement of cu_qp_delta_enabled_flag for low power mode encoding + pps->cu_qp_delta_enabled_flag = (ctx->va_rc_mode != VA_RC_CQP || ctx->low_power); + pps->diff_cu_qp_delta_depth = pps->cu_qp_delta_enabled_flag && ctx->low_power ? + sps->log2_diff_max_min_luma_coding_block_size : 0; pps->pps_loop_filter_across_slices_enabled_flag = 1; @@ -873,6 +878,7 @@ static int vaapi_encode_h265_init_slice_params(AVCodecContext *avctx, VAAPIEncodeSlice *slice) { VAAPIEncodeH265Context *priv = avctx->priv_data; + VAAPIEncodeContext *ctx = avctx->priv_data; VAAPIEncodeH265Picture *hpic = pic->priv_data; const H265RawSPS *sps = &priv->raw_sps; const H265RawPPS *pps = &priv->raw_pps; @@ -893,6 +899,9 @@ static int vaapi_encode_h265_init_slice_params(AVCodecContext *avctx, sh->slice_segment_address = slice->block_start; sh->slice_type = hpic->slice_type; + // driver requires low delay B frame in low power mode + if (sh->slice_type == HEVC_SLICE_P && ctx->low_power) + sh->slice_type = HEVC_SLICE_B; sh->slice_pic_order_cnt_lsb = hpic->pic_order_cnt & (1 << (sps->log2_max_pic_order_cnt_lsb_minus4 + 4)) - 1; @@ -1059,6 +1068,16 @@ static int vaapi_encode_h265_init_slice_params(AVCodecContext *avctx, vslice->ref_pic_list1[0] = vpic->reference_frames[1]; } + // Driver requires low delay B frame and matched ref_pic_list0/1[] + // for low power mode + if (pic->type == PICTURE_TYPE_P && ctx->low_power) { + vslice->slice_type = HEVC_SLICE_B; + for (i = 0; i < FF_ARRAY_ELEMS(vslice->ref_pic_list0); i++) { + vslice->ref_pic_list1[i].picture_id = vslice->ref_pic_list0[i].picture_id; + vslice->ref_pic_list1[i].flags = vslice->ref_pic_list0[i].flags; + } + } + return 0; } @@ -1175,8 +1194,11 @@ static av_cold int vaapi_encode_h265_init(AVCodecContext *avctx) ctx->surface_width = FFALIGN(avctx->width, 16); ctx->surface_height = FFALIGN(avctx->height, 16); - // CTU size is currently hard-coded to 32. - ctx->slice_block_width = ctx->slice_block_height = 32; + // CTU size is currently hard-coded to 32. (64 x 64 when using low power mode) + if (ctx->low_power) + ctx->slice_block_width = ctx->slice_block_height = 64; + else + ctx->slice_block_width = ctx->slice_block_height = 32; if (priv->qp > 0) ctx->explicit_qp = priv->qp;