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[79.124.17.100]) by mx.google.com with ESMTP id w5si1256059edv.6.2022.01.12.23.39.00; Wed, 12 Jan 2022 23:39:01 -0800 (PST) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@intel.com header.s=Intel header.b=QlpZC6i0; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 3E08768B6EB; Thu, 13 Jan 2022 09:38:41 +0200 (EET) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTPS id C4C6168B4BF for ; Thu, 13 Jan 2022 09:38:34 +0200 (EET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642059519; x=1673595519; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=1B358IcgsR3hlosfOD7CqpqidAx4bF1ynSxkaKjaxWA=; b=QlpZC6i0bs9qcZiRODNpGNTebwDb+rUiTSxBVpGEYCPf2OH75ndIbIlm THLtYuKw5XSmtdzkdmBhnn2JEDtTOzzAQgL7WJcDe3qI6xC1gWuGVuSpb pEnoiDs+bSWz2MJ/Rxv7M+DH+EYvP3Fy0gfp/Eg1ivmYA+5Dah3r9S1Kk 65VvGkOFjyXR39m094+d4cNjlO0Zbdp4P15RLAlR6VtGsQHOn4rEYtkEP kLLgl9HSNgJkpyYUE/OgL7Qqjtiy6QlHVhXlXYUCXEtxI8PA0nwxURqu3 HwGmVuPbi49MkWbDG+NhMQxACO08u+JnVYb0rW+pN+bhEA9pTXsawdyXE g==; X-IronPort-AV: E=McAfee;i="6200,9189,10225"; a="223933970" X-IronPort-AV: E=Sophos;i="5.88,284,1635231600"; d="scan'208";a="223933970" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jan 2022 23:38:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,284,1635231600"; d="scan'208";a="576847899" Received: from chenwenbin-z390-aorus-ultra.sh.intel.com ([10.239.35.110]) by fmsmga008.fm.intel.com with ESMTP; 12 Jan 2022 23:38:09 -0800 From: Wenbin Chen To: ffmpeg-devel@ffmpeg.org Date: Thu, 13 Jan 2022 15:36:46 +0800 Message-Id: <20220113073647.114995-3-wenbin.chen@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220113073647.114995-1-wenbin.chen@intel.com> References: <20220113073647.114995-1-wenbin.chen@intel.com> MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCH V4 3/4] libavcodec/qsvenc: Add low latency P-pyramid support to qsv X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: JT8vpB466f3z Add low latency P-pyramid support to qsv. This feature relates to command line option "-p_strategy". To enable this flag, user also need to set "-bf" to 0. P-strategy has two modes "1-simple" and "2-pyramid". The details of the two models refer to https://github.com/Intel-Media-SDK/MediaSDK/blob/master/doc/mediasdk-man.md#preftype Signed-off-by: Wenbin Chen --- doc/encoders.texi | 6 ++++++ libavcodec/qsvenc.c | 36 ++++++++++++++++++++++++++++++++++++ libavcodec/qsvenc.h | 3 +++ 3 files changed, 45 insertions(+) diff --git a/doc/encoders.texi b/doc/encoders.texi index 6fc94daa11..3d7c944fba 100644 --- a/doc/encoders.texi +++ b/doc/encoders.texi @@ -3296,6 +3296,9 @@ to allow changing of frame type from P and B to I. @item @var{adaptive_b} This flag controls changing of frame type from B to P. +@item @var{p_strategy} +Enable P-pyramid: 0-default 1-simple 2-pyramid(bf need to be set to 0). + @item @var{b_strategy} This option controls usage of B frames as reference. @@ -3394,6 +3397,9 @@ Enable rate distortion optimization. @item @var{max_frame_size} Maximum encoded frame size in bytes. +@item @var{p_strategy} +Enable P-pyramid: 0-default 1-simple 2-pyramid(bf need to be set to 0). + @item @var{dblk_idc} This option disable deblocking. It has value in range 0~2. diff --git a/libavcodec/qsvenc.c b/libavcodec/qsvenc.c index e87b69369a..f2ba0241c6 100644 --- a/libavcodec/qsvenc.c +++ b/libavcodec/qsvenc.c @@ -315,6 +315,14 @@ static void dump_video_param(AVCodecContext *avctx, QSVEncContext *q, case MFX_B_REF_PYRAMID: av_log(avctx, AV_LOG_VERBOSE, "pyramid"); break; default: av_log(avctx, AV_LOG_VERBOSE, "auto"); break; } + + av_log(avctx, AV_LOG_VERBOSE, "; PRefType: "); + switch (co3->PRefType) { + case MFX_P_REF_DEFAULT: av_log(avctx, AV_LOG_VERBOSE, "default"); break; + case MFX_P_REF_SIMPLE: av_log(avctx, AV_LOG_VERBOSE, "simple"); break; + case MFX_P_REF_PYRAMID: av_log(avctx, AV_LOG_VERBOSE, "pyramid"); break; + default: av_log(avctx, AV_LOG_VERBOSE, "unknown"); break; + } av_log(avctx, AV_LOG_VERBOSE, "\n"); #endif @@ -934,6 +942,34 @@ static int init_video_param(AVCodecContext *avctx, QSVEncContext *q) #if QSV_HAVE_CO3 q->extco3.Header.BufferId = MFX_EXTBUFF_CODING_OPTION3; q->extco3.Header.BufferSz = sizeof(q->extco3); + + if (avctx->codec_id == AV_CODEC_ID_HEVC || + avctx->codec_id == AV_CODEC_ID_H264) { +#if QSV_HAVE_PREF + switch (q->p_strategy) { + case 0: + q->extco3.PRefType = MFX_P_REF_DEFAULT; + break; + case 1: + q->extco3.PRefType = MFX_P_REF_SIMPLE; + break; + case 2: + q->extco3.PRefType = MFX_P_REF_PYRAMID; + break; + default: + q->extco3.PRefType = MFX_P_REF_DEFAULT; + av_log(avctx, AV_LOG_WARNING, + "invalid p_strategy, set to default\n"); + break; + } + if (q->extco3.PRefType == MFX_P_REF_PYRAMID && + avctx->max_b_frames != 0) { + av_log(avctx, AV_LOG_WARNING, + "Please set max_b_frames(-bf) to 0 to enable P-pyramid\n"); + } +#endif + } + #if QSV_HAVE_GPB if (avctx->codec_id == AV_CODEC_ID_HEVC) q->extco3.GPB = q->gpb ? MFX_CODINGOPTION_ON : MFX_CODINGOPTION_OFF; diff --git a/libavcodec/qsvenc.h b/libavcodec/qsvenc.h index aa49b35f07..960604cb9a 100644 --- a/libavcodec/qsvenc.h +++ b/libavcodec/qsvenc.h @@ -51,6 +51,7 @@ #define QSV_HAVE_LA_DS QSV_VERSION_ATLEAST(1, 8) #define QSV_HAVE_LA_HRD QSV_VERSION_ATLEAST(1, 11) #define QSV_HAVE_VDENC QSV_VERSION_ATLEAST(1, 15) +#define QSV_HAVE_PREF QSV_VERSION_ATLEAST(1, 16) #define QSV_HAVE_GPB QSV_VERSION_ATLEAST(1, 18) @@ -95,6 +96,7 @@ { "extbrc", "Extended bitrate control", OFFSET(qsv.extbrc), AV_OPT_TYPE_INT, { .i64 = -1 }, -1, 1, VE }, \ { "adaptive_i", "Adaptive I-frame placement", OFFSET(qsv.adaptive_i), AV_OPT_TYPE_INT, { .i64 = -1 }, -1, 1, VE }, \ { "adaptive_b", "Adaptive B-frame placement", OFFSET(qsv.adaptive_b), AV_OPT_TYPE_INT, { .i64 = -1 }, -1, 1, VE }, \ +{ "p_strategy", "Enable P-pyramid: 0-default 1-simple 2-pyramid(bf need to be set to 0).", OFFSET(qsv.p_strategy), AV_OPT_TYPE_INT, { .i64 = 0}, 0, 2, VE }, \ { "b_strategy", "Strategy to choose between I/P/B-frames", OFFSET(qsv.b_strategy), AV_OPT_TYPE_INT, { .i64 = -1 }, -1, 1, VE }, \ { "forced_idr", "Forcing I frames as IDR frames", OFFSET(qsv.forced_idr), AV_OPT_TYPE_BOOL,{ .i64 = 0 }, 0, 1, VE }, \ { "low_power", "enable low power mode(experimental: many limitations by mfx version, BRC modes, etc.)", OFFSET(qsv.low_power), AV_OPT_TYPE_BOOL, { .i64 = -1}, -1, 1, VE},\ @@ -187,6 +189,7 @@ typedef struct QSVEncContext { int adaptive_i; int adaptive_b; int b_strategy; + int p_strategy; int cavlc; int int_ref_type;