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[79.124.17.100]) by mx.google.com with ESMTP id h12-20020a170906718c00b006f3be8def3csi3649875ejk.378.2022.05.05.19.20.31; Thu, 05 May 2022 19:20:32 -0700 (PDT) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@intel.com header.s=Intel header.b=DbBy2y8U; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 75C4468B294; Fri, 6 May 2022 05:20:27 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTPS id 626F168AEB2 for ; Fri, 6 May 2022 05:20:20 +0300 (EEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651803625; x=1683339625; h=from:to:subject:date:message-id:mime-version: content-transfer-encoding; bh=/z0mkKe6TCbB1vjotPV2P+FZROwurQkDogeFhkti74M=; b=DbBy2y8UtB4ymdYyXr5w7FhDJgLfJ/EUJzHPGT95H6XORCTvV9htvTBs 1HWlH3HwupFrcUm/h9Ejk178Hv3tXWZKVUXNDbDajcKnvLJqAd1TfL652 1WAd3nqI5HKiXjLahLRM69ycsKmq+uK4G01Lg73INnMAN5/uxnl/S7eSz xxbdE+WUAsTqimHx1Rp8j7qS5t37aAVetqZpaTCsb5WHxDuoUeKntd9OI jsW48qjBsfjxL+OoUqtpZEEMWeiIWGuvG47cAsuwThZstidvsooDNyoiG McUs7D+nk/YFef4VYDkCk3GedOCFQiEmX6lt4urMRDKYf8HOT16Kb0Ke0 w==; X-IronPort-AV: E=McAfee;i="6400,9594,10338"; a="250313994" X-IronPort-AV: E=Sophos;i="5.91,203,1647327600"; d="scan'208";a="250313994" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 May 2022 19:20:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,203,1647327600"; d="scan'208";a="735323334" Received: from wenbin-z390-aorus-ultra.sh.intel.com ([10.239.35.4]) by orsmga005.jf.intel.com with ESMTP; 05 May 2022 19:20:16 -0700 From: Wenbin Chen To: ffmpeg-devel@ffmpeg.org Date: Fri, 6 May 2022 10:19:56 +0800 Message-Id: <20220506021956.2277740-1-wenbin.chen@intel.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCH] libavcodec/qsvenc: Add min/max QP control options for I/P/B frame X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: oYXAA2mUju0s From: Yue Heng To do more accurate QP control, add min/max QP control on I/P/B frame separately to qsv encoder. qmax and qmin still work but newly-added options have higher priority. Signed-off-by: Yue Heng Signed-off-by: Wenbin Chen --- doc/encoders.texi | 18 ++++++++++++++++++ libavcodec/qsvenc.c | 21 +++++++++++++++++++-- libavcodec/qsvenc.h | 12 ++++++++++++ 3 files changed, 49 insertions(+), 2 deletions(-) diff --git a/doc/encoders.texi b/doc/encoders.texi index 966032a720..86bcdbc04b 100644 --- a/doc/encoders.texi +++ b/doc/encoders.texi @@ -3282,6 +3282,24 @@ Forcing I frames as IDR frames. @item @var{low_power} For encoders set this flag to ON to reduce power consumption and GPU usage. + +@item @var{max_qp_i} +Maximum video quantizer scale for I frame. + +@item @var{min_qp_i} +Minimum video quantizer scale for I frame. + +@item @var{max_qp_p} +Maximum video quantizer scale for P frame. + +@item @var{min_qp_p} +Minimum video quantizer scale for P frame. + +@item @var{max_qp_b} +Maximum video quantizer scale for B frame. + +@item @var{min_qp_b} +Minimum video quantizer scale for B frame. @end table @subsection H264 options diff --git a/libavcodec/qsvenc.c b/libavcodec/qsvenc.c index fbb22ca436..a3e9bb4583 100644 --- a/libavcodec/qsvenc.c +++ b/libavcodec/qsvenc.c @@ -930,8 +930,13 @@ static int init_video_param(AVCodecContext *avctx, QSVEncContext *q) q->extco2.BRefType = q->b_strategy ? MFX_B_REF_PYRAMID : MFX_B_REF_OFF; #endif #if QSV_VERSION_ATLEAST(1, 9) - if (avctx->qmin >= 0 && avctx->qmax >= 0 && avctx->qmin > avctx->qmax) { - av_log(avctx, AV_LOG_ERROR, "qmin and or qmax are set but invalid, please make sure min <= max\n"); + if ((avctx->qmin >= 0 && avctx->qmax >= 0 && avctx->qmin > avctx->qmax) || + (q->max_qp_i >= 0 && q->min_qp_i >= 0 && q->min_qp_i > q->max_qp_i) || + (q->max_qp_p >= 0 && q->min_qp_p >= 0 && q->min_qp_p > q->max_qp_p) || + (q->max_qp_b >= 0 && q->min_qp_b >= 0 && q->min_qp_b > q->max_qp_b)) { + av_log(avctx, AV_LOG_ERROR, + "qmin and or qmax are set but invalid," + " please make sure min <= max\n"); return AVERROR(EINVAL); } if (avctx->qmin >= 0) { @@ -942,6 +947,18 @@ static int init_video_param(AVCodecContext *avctx, QSVEncContext *q) q->extco2.MaxQPI = avctx->qmax > 51 ? 51 : avctx->qmax; q->extco2.MaxQPP = q->extco2.MaxQPB = q->extco2.MaxQPI; } + if (q->min_qp_i >= 0) + q->extco2.MinQPI = q->min_qp_i > 51 ? 51 : q->min_qp_i; + if (q->max_qp_i >= 0) + q->extco2.MaxQPI = q->max_qp_i > 51 ? 51 : q->max_qp_i; + if (q->min_qp_p >= 0) + q->extco2.MinQPP = q->min_qp_p > 51 ? 51 : q->min_qp_p; + if (q->max_qp_p >= 0) + q->extco2.MaxQPP = q->max_qp_p > 51 ? 51 : q->max_qp_p; + if (q->min_qp_b >= 0) + q->extco2.MinQPB = q->min_qp_b > 51 ? 51 : q->min_qp_b; + if (q->max_qp_b >= 0) + q->extco2.MaxQPB = q->max_qp_b > 51 ? 51 : q->max_qp_b; #endif if (q->mbbrc >= 0) q->extco2.MBBRC = q->mbbrc ? MFX_CODINGOPTION_ON : MFX_CODINGOPTION_OFF; diff --git a/libavcodec/qsvenc.h b/libavcodec/qsvenc.h index cb84723dfa..ea05967db5 100644 --- a/libavcodec/qsvenc.h +++ b/libavcodec/qsvenc.h @@ -105,6 +105,12 @@ { "low_power", "enable low power mode(experimental: many limitations by mfx version, BRC modes, etc.)", OFFSET(qsv.low_power), AV_OPT_TYPE_BOOL, { .i64 = -1}, -1, 1, VE},\ { "dblk_idc", "This option disable deblocking. It has value in range 0~2.", OFFSET(qsv.dblk_idc), AV_OPT_TYPE_INT, { .i64 = 0 }, 0, 2, VE}, \ { "low_delay_brc", "Allow to strictly obey avg frame size", OFFSET(qsv.low_delay_brc), AV_OPT_TYPE_BOOL,{ .i64 = -1 }, -1, 1, VE }, \ +{ "max_qp_i", "Maximum video quantizer scale for I frame", OFFSET(qsv.max_qp_i), AV_OPT_TYPE_INT, { .i64 = -1 }, -1, 51, VE}, \ +{ "min_qp_i", "Minimum video quantizer scale for I frame", OFFSET(qsv.min_qp_i), AV_OPT_TYPE_INT, { .i64 = -1 }, -1, 51, VE}, \ +{ "max_qp_p", "Maximum video quantizer scale for P frame", OFFSET(qsv.max_qp_p), AV_OPT_TYPE_INT, { .i64 = -1 }, -1, 51, VE}, \ +{ "min_qp_p", "Minimum video quantizer scale for P frame", OFFSET(qsv.min_qp_p), AV_OPT_TYPE_INT, { .i64 = -1 }, -1, 51, VE}, \ +{ "max_qp_b", "Maximum video quantizer scale for B frame", OFFSET(qsv.max_qp_b), AV_OPT_TYPE_INT, { .i64 = -1 }, -1, 51, VE}, \ +{ "min_qp_b", "Minimum video quantizer scale for B frame", OFFSET(qsv.min_qp_b), AV_OPT_TYPE_INT, { .i64 = -1 }, -1, 51, VE}, \ extern const AVCodecHWConfigInternal *const ff_qsv_enc_hw_configs[]; @@ -218,6 +224,12 @@ typedef struct QSVEncContext { SetEncodeCtrlCB *set_encode_ctrl_cb; int forced_idr; int low_delay_brc; + int max_qp_i; + int min_qp_i; + int max_qp_p; + int min_qp_p; + int max_qp_b; + int min_qp_b; } QSVEncContext; int ff_qsv_enc_init(AVCodecContext *avctx, QSVEncContext *q);