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[79.124.17.100]) by mx.google.com with ESMTP id nb10-20020a1709071c8a00b0073093a35cf0si604572ejc.696.2022.08.18.00.02.15; Thu, 18 Aug 2022 00:02:15 -0700 (PDT) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@intel.com header.s=Intel header.b=hyDISlnx; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 3E3EA68B993; Thu, 18 Aug 2022 10:01:39 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTPS id 2297A68B998 for ; Thu, 18 Aug 2022 10:01:35 +0300 (EEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660806096; x=1692342096; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=q+7/OT6SrnFNB9SteH9me4DqQqi52wXjOF/cyLS5xRo=; b=hyDISlnxHLeSY+iHwX9njDrH2X7111+ZIgWBsGpFvFBG+iKibRXqA0Jt //OUT1AQDHThOnt8QLLuXiBtnYlEHbVJI+K2OIS64SUJztMDcNAU2lKbk aeh5Bg9mjefuT0lLb7JOCVg/RlzP0T+BG7d1HxeWRm9d962PNVDQnBtlK k6fv2MWkdZOPRYygv+pYTuC12259ragk6d/cbJf3k/eYZS2RHMdp7Gc7s Dr4pbcDqmccYt6EdY3QtwJUULe8z9JKTXWPSFd5tmYlOoggtSjVzxhTHp YBQrTE7iQao8B+LhrfbhQbuwSkZDjnLGAZay9P7YGvwvZh8rHhOsFL4TB Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10442"; a="378975930" X-IronPort-AV: E=Sophos;i="5.93,245,1654585200"; d="scan'208";a="378975930" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Aug 2022 00:01:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,245,1654585200"; d="scan'208";a="604155678" Received: from wenbin-z390-aorus-ultra.sh.intel.com ([10.239.35.4]) by orsmga007.jf.intel.com with ESMTP; 18 Aug 2022 00:01:15 -0700 From: Wenbin Chen To: ffmpeg-devel@ffmpeg.org Date: Thu, 18 Aug 2022 14:59:12 +0800 Message-Id: <20220818065912.158693-6-wenbin.chen@intel.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220818065912.158693-1-wenbin.chen@intel.com> References: <20220818065912.158693-1-wenbin.chen@intel.com> MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCH 6/6] libavcodec/qsvenc: Add low_delay_brc reset support to qsvenc X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: xYB4RnXkjSLw Signed-off-by: Wenbin Chen --- doc/encoders.texi | 4 ++++ libavcodec/qsvenc.c | 23 ++++++++++++++++++++++- libavcodec/qsvenc.h | 2 ++ 3 files changed, 28 insertions(+), 1 deletion(-) diff --git a/doc/encoders.texi b/doc/encoders.texi index fad3cad30b..d8e52006ce 100644 --- a/doc/encoders.texi +++ b/doc/encoders.texi @@ -3369,6 +3369,10 @@ Change these value to reset qsv codec's Intra Refresh configuration. @item @var{min_qp_b} Supported in h264_qsv. Change these value to reset qsv codec's max/min qp configuration. + +@item @var{low_delay_brc} +Supported in h264_qsv and hevc_qsv. +Change this value to reset qsv codec's low_delay_brc configuration. @end table @subsection H264 options diff --git a/libavcodec/qsvenc.c b/libavcodec/qsvenc.c index 3a3e6ccc9a..b53c25223a 100644 --- a/libavcodec/qsvenc.c +++ b/libavcodec/qsvenc.c @@ -934,6 +934,7 @@ static int init_video_param(AVCodecContext *avctx, QSVEncContext *q) q->old_int_ref_cycle_dist = q->int_ref_cycle_dist; if (q->low_delay_brc >= 0) q->extco3.LowDelayBRC = q->low_delay_brc ? MFX_CODINGOPTION_ON : MFX_CODINGOPTION_OFF; + q->old_low_delay_brc = q->low_delay_brc; if (q->max_frame_size_i >= 0) q->extco3.MaxFrameSizeI = q->max_frame_size_i; if (q->max_frame_size_p >= 0) @@ -1812,6 +1813,26 @@ static int update_min_max_qp(AVCodecContext *avctx, QSVEncContext *q) return updated; } +static int update_low_delay_brc(AVCodecContext *avctx, QSVEncContext *q) +{ + int updated = 0; + + if (avctx->codec_id != AV_CODEC_ID_H264 && avctx->codec_id != AV_CODEC_ID_HEVC) + return 0; + + UPDATE_PARAM(q->old_low_delay_brc, q->low_delay_brc); + if (!updated) + return 0; + + q->extco3.LowDelayBRC = MFX_CODINGOPTION_UNKNOWN; + if (q->low_delay_brc >= 0) + q->extco3.LowDelayBRC = q->low_delay_brc ? MFX_CODINGOPTION_ON : MFX_CODINGOPTION_OFF; + av_log(avctx, AV_LOG_DEBUG, "Reset LowDelayBRC: %s\n", + print_threestate(q->extco3.LowDelayBRC)); + + return updated; +} + static int update_parameters(AVCodecContext *avctx, QSVEncContext *q, const AVFrame *frame) { @@ -1824,7 +1845,7 @@ static int update_parameters(AVCodecContext *avctx, QSVEncContext *q, needReset |= update_max_frame_size(avctx, q); needReset |= update_gop_size(avctx, q); needReset |= update_rir(avctx, q); - + needReset |= update_low_delay_brc(avctx, q); ret = update_min_max_qp(avctx, q); if (ret < 0) return ret; diff --git a/libavcodec/qsvenc.h b/libavcodec/qsvenc.h index f48c87fbad..30db9dc94d 100644 --- a/libavcodec/qsvenc.h +++ b/libavcodec/qsvenc.h @@ -253,6 +253,8 @@ typedef struct QSVEncContext { int old_min_qp_p; int old_max_qp_b; int old_min_qp_b; + // This is used for low_delay_brc reset + int old_low_delay_brc; } QSVEncContext; int ff_qsv_enc_init(AVCodecContext *avctx, QSVEncContext *q);