From patchwork Tue Sep 6 09:22:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chen, Wenbin" X-Patchwork-Id: 37695 Delivered-To: ffmpegpatchwork2@gmail.com Received: by 2002:a05:6a20:139a:b0:8f:1db5:eae2 with SMTP id w26csp3135997pzh; Tue, 6 Sep 2022 02:26:13 -0700 (PDT) X-Google-Smtp-Source: AA6agR5lTX0WyffmEVaWuqTcTLYs03a+iCGpOYtcWLtQLRzhw5+k7osgXUqYKkVGtwDH81IBvWnQ X-Received: by 2002:a17:907:1dec:b0:741:44ca:131a with SMTP id og44-20020a1709071dec00b0074144ca131amr31040934ejc.695.1662456373044; Tue, 06 Sep 2022 02:26:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1662456373; cv=none; d=google.com; s=arc-20160816; b=K2RcVLsauT8ahd++Q0K5eZ4UTB4M+QXRS3N9FEdlz60VxHPbMnEVZn/zYzNDzSM4YK yKCNOWWplVvViUkCbgrGLoA8rDdlXQaaEhM3HreOsjxUG8h27NAYXu15JqpqKZpsNUBQ ukLSOGMelkW+ScelEf42N3WL4buLuJ9fP0bV+o70LJegBOB9mZPK1m/FCC3XCPA8l4hG XilC2md6BZFZNCUGH7NPhgi4jdQtsQm5W6F+/FgEorVTolvyJF+7xHtJheyQNzhO0tPf aG4Fc0d3A4Elm7aol82dmm6xNIWCYUebJ/hx0Gz20e8iSN/UBft2V0BaPkOxRDHT7VF9 FWJw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:reply-to:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:subject:mime-version:references:in-reply-to:message-id :date:to:from:dkim-signature:delivered-to; bh=3/6PeZJ+fK9sV1C8AdrdC6WBpBl27Buv/+H1yFbINUE=; b=pgPjvVv3dNbwUQsZi+OPbNHj6wtXgcGlxoCKjrdjJbkTi99hLqXyxaKyQVDhiQbFgz yLyr6LPNipqyZCXpLGZ5CM2ioNWsB4LwxS37Fms/i+XOZS/hgIvUhAxC1nzxzujK0+LY qchbG3NGjSvVg9mV36nd0txLKocl5zGQ9zOrIH4mtlf1QgIYd9Eiquxqza0kIk6ukWDs qzI5VoOKSn7XnGGOxJlNsw7LmuVJYWNpSzZwa68exPgxGEZfpPsmbJCooLvK7pgjcMrx AJ+lCJSaznHKgjCGUyAyFyaTCba774Pwacvy1dhCNNiUFoxj+mBZ/us5jdHrkMwMbS4d kaYA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@intel.com header.s=Intel header.b=ipsUVhcB; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Return-Path: Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org. [79.124.17.100]) by mx.google.com with ESMTP id ds7-20020a170907724700b007417ca60a22si10216893ejc.38.2022.09.06.02.26.12; Tue, 06 Sep 2022 02:26:13 -0700 (PDT) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@intel.com header.s=Intel header.b=ipsUVhcB; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 6542968BACF; Tue, 6 Sep 2022 12:25:18 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTPS id 473FE68BACF for ; Tue, 6 Sep 2022 12:25:10 +0300 (EEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662456316; x=1693992316; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=UdRXvt14f+eZC7u8DvHLglHbGh+3DONzIIlSQGhdwZs=; b=ipsUVhcBagXWysOOLqdpddzmvaN0MAqsKTLAa51pB/fD6N05FQyrUVKN RDTa9DPZ30Km3VpqeEsDgWajG9NgfBpIcM2cXXdUPgCQMj/liveNrsjc/ DD0Hr9k+sXPJQfSihT3W8KZp9qxXPg+8rRyEAW1Ux9VZ/xhqZXUjy0NYH IxQ/+675S0LuKPzKb16pVDSr3fGT344LEbD08o2dq48wD92JGfuU8/gx1 ea6pTxZ98m/+vn2yd5I42s9uroh+dLcqRH3/dclS5gGe4wu1bxH/LPfgF tNlrVVhw/cQOn6Tbi4HIxGBWuKiGLv6c4K67jy2KAg5zsdrD5O20db/2S A==; X-IronPort-AV: E=McAfee;i="6500,9779,10461"; a="322720564" X-IronPort-AV: E=Sophos;i="5.93,293,1654585200"; d="scan'208";a="322720564" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2022 02:25:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,293,1654585200"; d="scan'208";a="565028260" Received: from wenbin-z390-aorus-ultra.sh.intel.com ([10.239.35.4]) by orsmga003.jf.intel.com with ESMTP; 06 Sep 2022 02:25:01 -0700 From: Wenbin Chen To: ffmpeg-devel@ffmpeg.org Date: Tue, 6 Sep 2022 17:22:58 +0800 Message-Id: <20220906092258.994742-7-wenbin.chen@intel.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220906092258.994742-1-wenbin.chen@intel.com> References: <20220906092258.994742-1-wenbin.chen@intel.com> MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCH v2 7/7] libavcodec/qsvenc: Add low_delay_brc reset support to qsvenc X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: Yp3W31F348TJ Signed-off-by: Wenbin Chen --- doc/encoders.texi | 4 ++++ libavcodec/qsvenc.c | 23 ++++++++++++++++++++++- libavcodec/qsvenc.h | 2 ++ 3 files changed, 28 insertions(+), 1 deletion(-) diff --git a/doc/encoders.texi b/doc/encoders.texi index 850e3c261c..453150f3e7 100644 --- a/doc/encoders.texi +++ b/doc/encoders.texi @@ -3369,6 +3369,10 @@ Change these value to reset qsv codec's Intra Refresh configuration. @item @var{min_qp_b} Supported in h264_qsv. Change these value to reset qsv codec's max/min qp configuration. + +@item @var{low_delay_brc} +Supported in h264_qsv and hevc_qsv. +Change this value to reset qsv codec's low_delay_brc configuration. @end table @subsection H264 options diff --git a/libavcodec/qsvenc.c b/libavcodec/qsvenc.c index 215e5930ef..58900d56a7 100644 --- a/libavcodec/qsvenc.c +++ b/libavcodec/qsvenc.c @@ -934,6 +934,7 @@ static int init_video_param(AVCodecContext *avctx, QSVEncContext *q) q->old_int_ref_cycle_dist = q->int_ref_cycle_dist; if (q->low_delay_brc >= 0) q->extco3.LowDelayBRC = q->low_delay_brc ? MFX_CODINGOPTION_ON : MFX_CODINGOPTION_OFF; + q->old_low_delay_brc = q->low_delay_brc; if (q->max_frame_size_i >= 0) q->extco3.MaxFrameSizeI = q->max_frame_size_i; if (q->max_frame_size_p >= 0) @@ -1814,6 +1815,26 @@ static int update_min_max_qp(AVCodecContext *avctx, QSVEncContext *q) return updated; } +static int update_low_delay_brc(AVCodecContext *avctx, QSVEncContext *q) +{ + int updated = 0; + + if (avctx->codec_id != AV_CODEC_ID_H264 && avctx->codec_id != AV_CODEC_ID_HEVC) + return 0; + + UPDATE_PARAM(q->old_low_delay_brc, q->low_delay_brc); + if (!updated) + return 0; + + q->extco3.LowDelayBRC = MFX_CODINGOPTION_UNKNOWN; + if (q->low_delay_brc >= 0) + q->extco3.LowDelayBRC = q->low_delay_brc ? MFX_CODINGOPTION_ON : MFX_CODINGOPTION_OFF; + av_log(avctx, AV_LOG_DEBUG, "Reset LowDelayBRC: %s\n", + print_threestate(q->extco3.LowDelayBRC)); + + return updated; +} + static int update_parameters(AVCodecContext *avctx, QSVEncContext *q, const AVFrame *frame) { @@ -1826,7 +1847,7 @@ static int update_parameters(AVCodecContext *avctx, QSVEncContext *q, needReset |= update_max_frame_size(avctx, q); needReset |= update_gop_size(avctx, q); needReset |= update_rir(avctx, q); - + needReset |= update_low_delay_brc(avctx, q); ret = update_min_max_qp(avctx, q); if (ret < 0) return ret; diff --git a/libavcodec/qsvenc.h b/libavcodec/qsvenc.h index 3ed20f757b..54e5cf89d3 100644 --- a/libavcodec/qsvenc.h +++ b/libavcodec/qsvenc.h @@ -267,6 +267,8 @@ typedef struct QSVEncContext { int old_min_qp_p; int old_max_qp_b; int old_min_qp_b; + // This is used for low_delay_brc reset + int old_low_delay_brc; } QSVEncContext; int ff_qsv_enc_init(AVCodecContext *avctx, QSVEncContext *q);