From patchwork Tue Sep 6 16:50:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?R=C3=A9mi_Denis-Courmont?= X-Patchwork-Id: 37713 Delivered-To: ffmpegpatchwork2@gmail.com Received: by 2002:a05:6a20:139a:b0:8f:1db5:eae2 with SMTP id w26csp3385322pzh; Tue, 6 Sep 2022 09:50:41 -0700 (PDT) X-Google-Smtp-Source: AA6agR7XUwRkfYImM6cjdo1DJZbiF54QnHMl+wn78kHUeiJFGlzqpACFMIEl0JKIPwKVL6HrkfB+ X-Received: by 2002:a05:6402:354f:b0:448:2385:b998 with SMTP id f15-20020a056402354f00b004482385b998mr39394638edd.57.1662483040730; Tue, 06 Sep 2022 09:50:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1662483040; cv=none; d=google.com; s=arc-20160816; b=Rgj5h5vRNNw9oD2GmfIsPLbrkrG/T7jyofsTrwnhLENQHnaM02Tye5q7MgRytFNS+5 zn8gPS8Ue1n8ykkQRI8ChlXrtgivUxEVkS+Kz6XuC+pa7NpcG1zcTM9dvtCNCNiJuq9S hoEXojptu6jCVeZ3xL5FJ2OzCc1Kr0THyf1AOP/1P3Eh8LcF0sYF1z0HMurVMTi5CeuX jfjXWcwJtrSl+5YNaTz0tqSXrvij/WTcmchvjJn7cMBsgbOSmUfYzcz8mD0L7rn8jfQQ 63corsrjNiz7UulubrLocNnR/GyWBOslfg3PONHs25P0FhASPVQC0g7EcklUPXK2HNlc 6Sbw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:reply-to:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:subject:mime-version:references:in-reply-to:message-id :date:to:from:delivered-to; bh=tY9v+MnUl5BAcjQ+7Po7fOjiEFSK1GpAdNAxjQs6RDo=; b=XE49CEnr6N8U1aQUMaCz/OxFltSUkTHu6b1DLGLV3+vP+lSY7lcybxjef/M/XZHnos u5hWxe3gobSX8ejA2H4EgUc3fVICuyQcMyXzwZ1bScqjm0oh0GKbD+a0fg0sO6O+tMA4 0CYuGm0e6zlOwDkTsqq6nLww5fiQqsX7EnirkPdu8EV6IHz76KHcDkWgeNhgTAepCukw HRdn+OHEsYz2fT6gdnUSVTSKmaTmOkwIaI2r2QFpYZ0XWtNl1//FbrNhwatNcPu67Hja 1RGEYSpLQC855qwri7862Xi+DgSYns4nQq7uWLHqgp90n0vAiqKPnAHM5cBFVyPYmiME vjgg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Return-Path: Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org. [79.124.17.100]) by mx.google.com with ESMTP id h11-20020a170906854b00b007309e3ce06csi8129057ejy.647.2022.09.06.09.50.40; Tue, 06 Sep 2022 09:50:40 -0700 (PDT) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id A72DA68BB18; Tue, 6 Sep 2022 19:50:30 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from ursule.remlab.net (vps-a2bccee9.vps.ovh.net [51.75.19.47]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 28BF368BAFD for ; Tue, 6 Sep 2022 19:50:28 +0300 (EEST) Received: from basile.remlab.net (localhost [IPv6:::1]) by ursule.remlab.net (Postfix) with ESMTP id 94277C00AE for ; Tue, 6 Sep 2022 19:50:27 +0300 (EEST) From: remi@remlab.net To: ffmpeg-devel@ffmpeg.org Date: Tue, 6 Sep 2022 19:50:24 +0300 Message-Id: <20220906165027.91347-2-remi@remlab.net> X-Mailer: git-send-email 2.37.2 In-Reply-To: <12048155.O9o76ZdvQC@basile.remlab.net> References: <12048155.O9o76ZdvQC@basile.remlab.net> MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCH 2/5] lavu/riscv: AV_READ_TIME cycle counter X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: 9cL0vsLKzpiP From: Rémi Denis-Courmont This uses the architected RISC-V 64-bit cycle counter from the RISC-V unprivileged instruction set. In 64-bit and 128-bit, this is a straightforward CSR read. In 32-bit mode, the 64-bit value is exposed as two CSRs, which cannot be read atomically, so a loop is necessary to detect and fix up the race condition where the bottom half wraps exactly between the two reads. --- libavutil/riscv/timer.h | 53 +++++++++++++++++++++++++++++++++++++++++ libavutil/timer.h | 2 ++ 2 files changed, 55 insertions(+) create mode 100644 libavutil/riscv/timer.h diff --git a/libavutil/riscv/timer.h b/libavutil/riscv/timer.h new file mode 100644 index 0000000000..a34157a566 --- /dev/null +++ b/libavutil/riscv/timer.h @@ -0,0 +1,53 @@ +/* + * This file is part of FFmpeg. + * + * FFmpeg is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * FFmpeg is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with FFmpeg; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef AVUTIL_RISCV_TIMER_H +#define AVUTIL_RISCV_TIMER_H + +#include "config.h" + +#if HAVE_INLINE_ASM +#include + +static inline uint64_t rdcycle64(void) +{ +#if (__riscv_xlen >= 64) + uintptr_t cycles; + + __asm__ volatile ("rdcycle %0" : "=r"(cycles)); + +#else + uint64_t cycles; + uint32_t hi, lo, check; + + __asm__ volatile ( + "1: rdcycleh %0\n" + " rdcycle %1\n" + " rdcycleh %2\n" + " bne %0, %2, 1b\n" : "=r" (hi), "=r" (lo), "=r" (check)); + + cycles = (((uint64_t)hi) << 32) | lo; + +#endif + return cycles; +} + +#define AV_READ_TIME rdcycle64 + +#endif +#endif /* AVUTIL_RISCV_TIMER_H */ diff --git a/libavutil/timer.h b/libavutil/timer.h index 48e576739f..d3db5a27ef 100644 --- a/libavutil/timer.h +++ b/libavutil/timer.h @@ -57,6 +57,8 @@ # include "arm/timer.h" #elif ARCH_PPC # include "ppc/timer.h" +#elif ARCH_RISCV +# include "riscv/timer.h" #elif ARCH_X86 # include "x86/timer.h" #endif