From patchwork Mon Sep 12 15:53:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?R=C3=A9mi_Denis-Courmont?= X-Patchwork-Id: 37859 Delivered-To: ffmpegpatchwork2@gmail.com Received: by 2002:a05:6a20:3b1c:b0:96:9ee8:5cfd with SMTP id c28csp162945pzh; Mon, 12 Sep 2022 08:53:55 -0700 (PDT) X-Google-Smtp-Source: AA6agR5W9zQUOgYxgNua2xjt1lFqyXFWR+zq0OUi4lvZQ4M4bEGAsrGDpt5qnZVRks5zuuXTBThM X-Received: by 2002:a17:906:fe0b:b0:730:3646:d177 with SMTP id wy11-20020a170906fe0b00b007303646d177mr18360789ejb.688.1662998035566; Mon, 12 Sep 2022 08:53:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1662998035; cv=none; d=google.com; s=arc-20160816; b=WwPRQPKL8Uv32HubRLphKA1Hyypaejn/zHbqtbazPdO6hLM8Ls86LWsxncbDaREh6Q OJVdTmn9c9VeVOtmlG1I7m2WUNGVUs49j0yhyxlASBDEADk/klH/V4Xq1i/rXaDnrJ0W KgT+ar28WGmEhKT3jRM+036+wu5FVVCHTjb4t0eYhLRyxUk3aIoHJgeRyqFG6XndchiG FyOUrLFM8hVW/4r7VVera9UBT41JnzBibP/mhPACHxbTPtkOsLjtB5PGjb00BVycmUC9 +1IlX6INTLd4q20tCrZSZcGyUM3k6K2VpFtPoUc752uT8d459jmkEAkbePTkUuE9IDcA X+Bg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:reply-to:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:subject:mime-version:references:in-reply-to:message-id :date:to:from:delivered-to; bh=tY9v+MnUl5BAcjQ+7Po7fOjiEFSK1GpAdNAxjQs6RDo=; b=n3p0vsZjstg9zGBjgfJ1kx7zQjEjFalq+TmSvIOwPd3rsPxlgUv6UhjNUBrBaLnfEB TqKBJCxX/Re/qD3nwfPjGGcvHwVIusW+e2l2NkBqRNxJ1lDngJd2Pj67MqQ/Ixejf+pQ FxTedCCNHhfB0SGEl4gpyHhCYMgsI2Tda89108sHO98ZTm04iHrNrRro1v71cp3l7SD0 uhB0NWID/h/L9m3DQLJxaPevslrNywohbiPub5btI9nmeYg8kt0rjxmALIk8KZ8E4eHi T88kGkcYSTX1ZdzhXPY5i/fN8hpuPhHA/2g5z5mCH+bMFqm+BMg0sRtD8gL2JfdXg/x7 QuTg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Return-Path: Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org. [79.124.17.100]) by mx.google.com with ESMTP id i31-20020a0564020f1f00b0044e4e32ed3asi4891475eda.259.2022.09.12.08.53.55; Mon, 12 Sep 2022 08:53:55 -0700 (PDT) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 8D69D68BB47; Mon, 12 Sep 2022 18:53:42 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from ursule.remlab.net (vps-a2bccee9.vps.ovh.net [51.75.19.47]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id BF1C568BB2E for ; Mon, 12 Sep 2022 18:53:34 +0300 (EEST) Received: from basile.remlab.net (localhost [IPv6:::1]) by ursule.remlab.net (Postfix) with ESMTP id 40F2FC001B for ; Mon, 12 Sep 2022 18:53:34 +0300 (EEST) From: remi@remlab.net To: ffmpeg-devel@ffmpeg.org Date: Mon, 12 Sep 2022 18:53:17 +0300 Message-Id: <20220912155333.59843-2-remi@remlab.net> X-Mailer: git-send-email 2.37.2 In-Reply-To: <2652141.mvXUDI8C0e@basile.remlab.net> References: <2652141.mvXUDI8C0e@basile.remlab.net> MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCH 02/18] lavu/riscv: AV_READ_TIME cycle counter X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: tfjbI5dTMF3F From: Rémi Denis-Courmont This uses the architected RISC-V 64-bit cycle counter from the RISC-V unprivileged instruction set. In 64-bit and 128-bit, this is a straightforward CSR read. In 32-bit mode, the 64-bit value is exposed as two CSRs, which cannot be read atomically, so a loop is necessary to detect and fix up the race condition where the bottom half wraps exactly between the two reads. --- libavutil/riscv/timer.h | 53 +++++++++++++++++++++++++++++++++++++++++ libavutil/timer.h | 2 ++ 2 files changed, 55 insertions(+) create mode 100644 libavutil/riscv/timer.h diff --git a/libavutil/riscv/timer.h b/libavutil/riscv/timer.h new file mode 100644 index 0000000000..a34157a566 --- /dev/null +++ b/libavutil/riscv/timer.h @@ -0,0 +1,53 @@ +/* + * This file is part of FFmpeg. + * + * FFmpeg is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * FFmpeg is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with FFmpeg; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef AVUTIL_RISCV_TIMER_H +#define AVUTIL_RISCV_TIMER_H + +#include "config.h" + +#if HAVE_INLINE_ASM +#include + +static inline uint64_t rdcycle64(void) +{ +#if (__riscv_xlen >= 64) + uintptr_t cycles; + + __asm__ volatile ("rdcycle %0" : "=r"(cycles)); + +#else + uint64_t cycles; + uint32_t hi, lo, check; + + __asm__ volatile ( + "1: rdcycleh %0\n" + " rdcycle %1\n" + " rdcycleh %2\n" + " bne %0, %2, 1b\n" : "=r" (hi), "=r" (lo), "=r" (check)); + + cycles = (((uint64_t)hi) << 32) | lo; + +#endif + return cycles; +} + +#define AV_READ_TIME rdcycle64 + +#endif +#endif /* AVUTIL_RISCV_TIMER_H */ diff --git a/libavutil/timer.h b/libavutil/timer.h index 48e576739f..d3db5a27ef 100644 --- a/libavutil/timer.h +++ b/libavutil/timer.h @@ -57,6 +57,8 @@ # include "arm/timer.h" #elif ARCH_PPC # include "ppc/timer.h" +#elif ARCH_RISCV +# include "riscv/timer.h" #elif ARCH_X86 # include "x86/timer.h" #endif