From patchwork Mon Sep 26 14:52:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?R=C3=A9mi_Denis-Courmont?= X-Patchwork-Id: 38364 Delivered-To: ffmpegpatchwork2@gmail.com Received: by 2002:a05:6a20:3b1c:b0:96:9ee8:5cfd with SMTP id c28csp2306561pzh; Mon, 26 Sep 2022 07:57:29 -0700 (PDT) X-Google-Smtp-Source: AMsMyM48JXpwp4NOQ/7idhJ97TjrWCDXsm2QOxmcz/5QvitSXOMh5pYrYufcSLB1lW7QizZQiJ0n X-Received: by 2002:a17:906:6a25:b0:782:1ce3:7e94 with SMTP id qw37-20020a1709066a2500b007821ce37e94mr18347780ejc.507.1664204249109; Mon, 26 Sep 2022 07:57:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1664204249; cv=none; d=google.com; s=arc-20160816; b=Cyhw0taUIC1CS7gTBfXMBj4Ll++eXUZaOGe9vh93xpoT5khhKdR08bsFyrI8b62Mxr qqOzkFHWs2h0IP+K97PWLbS9AbcncuXgawXfbAB1R21sPb39N/tB1aYszMgLegnBp9ht BWIwLFIcM/8FraK5bxF19IVU12vvy4T6xqLBwBqdC8AXwE9GqItXV1YJf1nkqGlz3Oql oxbIklciU7C3JnUX3XbEitTirScA7NBi/GbArhJ6cagc16GQcoXm8EbBIX8cBgqx+dzD w2C+yNdj4PCLD3NTO2FgLMT8VTsT5cHIRsz5jWAhbpXkGVBcejPcpX5h/0/18Oi1/ofe bL6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:reply-to:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:subject:mime-version:references:in-reply-to:message-id :date:to:from:delivered-to; bh=lfAWaa4gsTnFa7YWly9SXaogWEB+z4giIN/n+ceC1u0=; b=kdmiYjT0BgQUWshPpqHCfKXLdlpLc3sp+aZvPVBcDy2AEiJ2fek28dEULy0mCZ9kHZ Kidyy+cY2ozTVhlgWaNbrV0kRpUaXEHCbjpBigx7t0cUwhgdVQQtCiH9I5FqHl25Iv5z 2L7BaTX4ym/XAzfLNXUxYk81peMXAgbIBrsRJHWFvU6FeyjOIbwr2ByIj8LC0C6RAGpq EjNqnvQwe2y+AS7BIECIxZztwiAUq8hwa0aglMqUcZG624jqW9mnZRXNY+qs9yLjLWe6 C8ckChCioX+DeSXv08NmAU3SGGgh7LG0nf47QjFoHLjKZBx8zKwkSjFeqD0mcgK6QWcR O5qw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Return-Path: Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org. [79.124.17.100]) by mx.google.com with ESMTP id du3-20020a17090772c300b0077bb3c728c5si176011ejc.20.2022.09.26.07.57.28; Mon, 26 Sep 2022 07:57:29 -0700 (PDT) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id BE76D68BC01; Mon, 26 Sep 2022 17:53:26 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from ursule.remlab.net (vps-a2bccee9.vps.ovh.net [51.75.19.47]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 925B968BA9B for ; Mon, 26 Sep 2022 17:52:57 +0300 (EEST) Received: from basile.remlab.net (localhost [IPv6:::1]) by ursule.remlab.net (Postfix) with ESMTP id 765B2C00CB for ; Mon, 26 Sep 2022 17:52:56 +0300 (EEST) From: remi@remlab.net To: ffmpeg-devel@ffmpeg.org Date: Mon, 26 Sep 2022 17:52:51 +0300 Message-Id: <20220926145251.56351-31-remi@remlab.net> X-Mailer: git-send-email 2.37.2 In-Reply-To: <5862173.lOV4Wx5bFT@basile.remlab.net> References: <5862173.lOV4Wx5bFT@basile.remlab.net> MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCH 31/31] lavc/aacpsdsp: RISC-V V stereo_interpolate[0] X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: UowJCGPjxL4q From: Rémi Denis-Courmont --- libavcodec/riscv/aacpsdsp_init.c | 4 +++ libavcodec/riscv/aacpsdsp_rvv.S | 56 ++++++++++++++++++++++++++++++++ 2 files changed, 60 insertions(+) diff --git a/libavcodec/riscv/aacpsdsp_init.c b/libavcodec/riscv/aacpsdsp_init.c index c2201ffb6a..f42baf4251 100644 --- a/libavcodec/riscv/aacpsdsp_init.c +++ b/libavcodec/riscv/aacpsdsp_init.c @@ -34,6 +34,9 @@ void ff_ps_hybrid_analysis_ileave_rvv(float (*out)[32][2], float L[2][38][64], void ff_ps_hybrid_synthesis_deint_rvv(float out[2][38][64], float (*in)[32][2], int i, int len); +void ff_ps_stereo_interpolate_rvv(float (*l)[2], float (*r)[2], + float h[2][4], float h_step[2][4], int len); + av_cold void ff_psdsp_init_riscv(PSDSPContext *c) { #if HAVE_RVV @@ -43,6 +46,7 @@ av_cold void ff_psdsp_init_riscv(PSDSPContext *c) c->add_squares = ff_ps_add_squares_rvv; c->mul_pair_single = ff_ps_mul_pair_single_rvv; c->hybrid_analysis = ff_ps_hybrid_analysis_rvv; + c->stereo_interpolate[0] = ff_ps_stereo_interpolate_rvv; } if (flags & AV_CPU_FLAG_RVV_I32) { diff --git a/libavcodec/riscv/aacpsdsp_rvv.S b/libavcodec/riscv/aacpsdsp_rvv.S index 0cbe4c1d3c..1d6e73fd2d 100644 --- a/libavcodec/riscv/aacpsdsp_rvv.S +++ b/libavcodec/riscv/aacpsdsp_rvv.S @@ -219,3 +219,59 @@ func ff_ps_hybrid_synthesis_deint_rvv, zve32x 3: ret endfunc + +func ff_ps_stereo_interpolate_rvv, zve32f + vsetvli t0, zero, e32, m1, ta, ma + vid.v v24 + flw ft0, (a2) + vadd.vi v24, v24, 1 // v24[i] = i + 1 + flw ft1, 4(a2) + vfcvt.f.xu.v v24, v24 + flw ft2, 8(a2) + vfmv.v.f v16, ft0 + flw ft3, 12(a2) + vfmv.v.f v17, ft1 + flw ft0, (a3) + vfmv.v.f v18, ft2 + flw ft1, 4(a3) + vfmv.v.f v19, ft3 + flw ft2, 8(a3) + vfmv.v.f v20, ft0 + flw ft3, 12(a3) + vfmv.v.f v21, ft1 + fcvt.s.wu ft4, t0 // (float)(vlenb / sizeof (float)) + vfmv.v.f v22, ft2 + fmul.s ft0, ft0, ft4 + vfmv.v.f v23, ft3 + fmul.s ft1, ft1, ft4 + vfmacc.vv v16, v24, v20 // h0 += (i + 1) * h0_step + fmul.s ft2, ft2, ft4 + vfmacc.vv v17, v24, v21 + fmul.s ft3, ft3, ft4 + vfmacc.vv v18, v24, v22 + vfmacc.vv v19, v24, v23 +1: + vsetvli t0, a4, e32, m1, ta, ma + vlseg2e32.v v8, (a0) // v8:l_re, v9:l_im + sub a4, a4, t0 + vlseg2e32.v v10, (a1) // v10:r_re, v11:r_im + vfmul.vv v12, v8, v16 + vfmul.vv v13, v9, v16 + vfmul.vv v14, v8, v17 + vfmul.vv v15, v9, v17 + vfmacc.vv v12, v10, v18 + vfmacc.vv v13, v11, v18 + vfmacc.vv v14, v10, v19 + vfmacc.vv v15, v11, v19 + vsseg2e32.v v12, (a0) + sh3add a0, t0, a0 + vsseg2e32.v v14, (a1) + sh3add a1, t0, a1 + vfadd.vf v16, v16, ft0 // h0 += (vlenb / sizeof (float)) * h0_step + vfadd.vf v17, v17, ft1 + vfadd.vf v18, v18, ft2 + vfadd.vf v19, v19, ft3 + bnez a4, 1b + + ret +endfunc