From patchwork Thu Dec 1 08:13:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wang, Fei W" X-Patchwork-Id: 39552 Delivered-To: ffmpegpatchwork2@gmail.com Received: by 2002:a05:6a21:999a:b0:a4:2148:650a with SMTP id ve26csp196139pzb; Thu, 1 Dec 2022 00:15:28 -0800 (PST) X-Google-Smtp-Source: AA0mqf6L7wuA7m/2OkQIDXDX3DVzJWgLjkTH4v20siBalEDzZrFGjIdEMMlYQbsVWRNq/x1fRmk6 X-Received: by 2002:a17:907:2a10:b0:7a7:9b01:2a6c with SMTP id fd16-20020a1709072a1000b007a79b012a6cmr55294908ejc.153.1669882528548; Thu, 01 Dec 2022 00:15:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669882528; cv=none; d=google.com; s=arc-20160816; b=iR7uaVZlrVjyuUKXNvBIHPtRmchIrkoGvsFvyrciaRBBA8tOJS7ARhxKxa/WtRHsay lG0FVzU8wseKZDPwQYdB6D+8/vgNd8hXox7hVm5Rq8OwYaoArZCEEKUGDkftaKeHn1/S IL60quTUNbRXBQFWOCsorq/KIWg8UpRb76OrILsGx6g5lJ2nhxBxAmt4R+X1K79+hXqp VvGKaVELpLzG7dunyRz3gpw8tiOQzeJ50m34WsQFednP3fNl8Etkd28cYPW3uFmVKtSL ehCyXItRmf1Cq3V2YJ8zo+KncrS3WBI1Xr3httZg6y3rHwvkXxN0h5SiqrjWnxC4WZ3i A9IQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:reply-to :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:delivered-to; bh=f7wnqKXCrmv3y/CF1gyOE57VLA38wxPqgHxjMtMR7h0=; b=bdDND1URU48IU2zR2e/w94DDrJj5IJ5+aT6+M7ljdkonIHCCU8Xd1sOdib5x7jbpre Q/89h63T3TGuLTpRrMLYHExTyGHkW6k0ZQgk2/SFZldGO5hicn6ofFpYUY9l2IbM4jcg sPxkEA8LnqpLLMV3/8kw+i7MJ1OyYiLJ6SK6eLJdXap0/SC8VNtwO7gKxZ19+N638iHh Br9j9qB8vPa4PpvYRfMGdHwKXk+QVPVsKMe6ONbt3Wht353UHOwtlI44YQnUojul8okp KFONItmPoe+x8dEVgYOCc7moZX5QFEGIcgNDbTIQysIN9DZMSiVkD7ZaTMdpBKRExXVt o1/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@intel.com header.s=Intel header.b=SPiZLqmY; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Return-Path: Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org. [79.124.17.100]) by mx.google.com with ESMTP id di10-20020a170906730a00b007aea0bbe2e2si3957255ejc.394.2022.12.01.00.15.22; Thu, 01 Dec 2022 00:15:28 -0800 (PST) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@intel.com header.s=Intel header.b=SPiZLqmY; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 4785368B945; Thu, 1 Dec 2022 10:14:56 +0200 (EET) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTPS id 68F9B68B081 for ; Thu, 1 Dec 2022 10:14:48 +0200 (EET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669882493; x=1701418493; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=k0HRBr/qKok5hY78TAMX4n/HYpbCjOQyOpOnjANEq6g=; b=SPiZLqmYBTy02yNJbIfApHtv2EUtYypdFbo+e/sMCoTFoN3IjjX/hmNA IJYv/hCeoaMxAoQCo4lNaCkcSdmJcJp5efNLmwPK403+58nHbZSMSEV+l bFuuvrnyma9SDFj8XVoMwkpUgoK/1YbD0IvRnj9caeziDgpTEcSbUEF5u /1wix+tH1e1L3S5gyN8ZNSSvQCUw3M2J3Jxp6ykAJB83snnWXTrzgmA6o 4L/yJgkiDoVmx4W35b4qg9zmxRgBJV12DUJ/6INVz8uvMH3H3w7AJt1Qg f87nQqh439oUkjta+9B+yrpUmYmAG5qxltJlx7yKy00dx9795wcXiCMlh g==; X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="298989822" X-IronPort-AV: E=Sophos;i="5.96,207,1665471600"; d="scan'208";a="298989822" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Dec 2022 00:14:46 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="675341730" X-IronPort-AV: E=Sophos;i="5.96,207,1665471600"; d="scan'208";a="675341730" Received: from t.sh.intel.com ([10.239.159.159]) by orsmga008.jf.intel.com with ESMTP; 01 Dec 2022 00:14:44 -0800 From: Fei Wang To: ffmpeg-devel@ffmpeg.org Date: Thu, 1 Dec 2022 16:13:59 +0800 Message-Id: <20221201081408.2194579-4-fei.w.wang@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221201081408.2194579-1-fei.w.wang@intel.com> References: <20221201081408.2194579-1-fei.w.wang@intel.com> MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCH v1 04/13] lavc/hevcdec: Add slice parse support for HEVC SCC extension X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Cc: Linjie Fu , Fei Wang , Linjie Fu Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: GMOHN4xbIqaj From: Linjie Fu Signed-off-by: Linjie Fu Signed-off-by: Fei Wang --- libavcodec/hevcdec.c | 6 ++++++ libavcodec/hevcdec.h | 4 ++++ 2 files changed, 10 insertions(+) diff --git a/libavcodec/hevcdec.c b/libavcodec/hevcdec.c index fb44d8d3f2..edf3a2b134 100644 --- a/libavcodec/hevcdec.c +++ b/libavcodec/hevcdec.c @@ -857,6 +857,12 @@ static int hls_slice_header(HEVCContext *s) sh->slice_cr_qp_offset = 0; } + if (s->ps.pps->pps_slice_act_qp_offsets_present_flag) { + sh->slice_act_y_qp_offset = get_se_golomb(gb); + sh->slice_act_cb_qp_offset = get_se_golomb(gb); + sh->slice_act_cr_qp_offset = get_se_golomb(gb); + } + if (s->ps.pps->chroma_qp_offset_list_enabled_flag) sh->cu_chroma_qp_offset_enabled_flag = get_bits1(gb); else diff --git a/libavcodec/hevcdec.h b/libavcodec/hevcdec.h index 9d3f4adbb3..7841ba8565 100644 --- a/libavcodec/hevcdec.h +++ b/libavcodec/hevcdec.h @@ -295,6 +295,10 @@ typedef struct SliceHeader { int slice_cb_qp_offset; int slice_cr_qp_offset; + int slice_act_y_qp_offset; + int slice_act_cb_qp_offset; + int slice_act_cr_qp_offset; + uint8_t cu_chroma_qp_offset_enabled_flag; int beta_offset; ///< beta_offset_div2 * 2