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[79.124.17.100]) by mx.google.com with ESMTP id lv25-20020a170906bc9900b009937e7c4e50si1868700ejb.546.2023.10.04.12.51.40; Wed, 04 Oct 2023 12:51:46 -0700 (PDT) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 02F4668CB23; Wed, 4 Oct 2023 22:51:20 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from ursule.remlab.net (vps-a2bccee9.vps.ovh.net [51.75.19.47]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 2F96668CA92 for ; Wed, 4 Oct 2023 22:51:11 +0300 (EEST) Received: from basile.remlab.net (localhost [IPv6:::1]) by ursule.remlab.net (Postfix) with ESMTP id D258BC018F for ; Wed, 4 Oct 2023 22:51:10 +0300 (EEST) From: =?utf-8?q?R=C3=A9mi_Denis-Courmont?= To: ffmpeg-devel@ffmpeg.org Date: Wed, 4 Oct 2023 22:51:09 +0300 Message-ID: <20231004195110.38615-3-remi@remlab.net> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231004195110.38615-1-remi@remlab.net> References: <20231004195110.38615-1-remi@remlab.net> MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCH 3/4] lavu/fixed_dsp: R-V V vector_fmul X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: 9DhFCODKmGte vector_fmul_fixed_c: 4.0 vector_fmul_fixed_rvv_i64: 0.5 --- libavutil/riscv/fixed_dsp_init.c | 3 +++ libavutil/riscv/fixed_dsp_rvv.S | 17 +++++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/libavutil/riscv/fixed_dsp_init.c b/libavutil/riscv/fixed_dsp_init.c index 470b35fb63..02883b31d4 100644 --- a/libavutil/riscv/fixed_dsp_init.c +++ b/libavutil/riscv/fixed_dsp_init.c @@ -25,6 +25,8 @@ #include "libavutil/cpu.h" #include "libavutil/fixed_dsp.h" +void ff_vector_fmul_fixed_rvv(int *dst, const int *src0, const int *src1, + int len); void ff_vector_fmul_reverse_fixed_rvv(int *dst, const int *src0, const int *src1, int len); void ff_vector_fmul_add_fixed_rvv(int *dst, const int *src0, const int *src1, @@ -38,6 +40,7 @@ av_cold void ff_fixed_dsp_init_riscv(AVFixedDSPContext *fdsp) int flags = av_get_cpu_flags(); if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR)) { + fdsp->vector_fmul = ff_vector_fmul_fixed_rvv; fdsp->vector_fmul_reverse = ff_vector_fmul_reverse_fixed_rvv; fdsp->vector_fmul_add = ff_vector_fmul_add_fixed_rvv; diff --git a/libavutil/riscv/fixed_dsp_rvv.S b/libavutil/riscv/fixed_dsp_rvv.S index 8a5d1853c5..d5d538239f 100644 --- a/libavutil/riscv/fixed_dsp_rvv.S +++ b/libavutil/riscv/fixed_dsp_rvv.S @@ -20,6 +20,23 @@ #include "asm.S" +func ff_vector_fmul_fixed_rvv, zve32x + csrwi vxrm, 0 +1: + vsetvli t0, a3, e32, m4, ta, ma + vle32.v v16, (a1) + sub a3, a3, t0 + vle32.v v24, (a2) + sh2add a1, t0, a1 + vsmul.vv v8, v16, v24 + sh2add a2, t0, a2 + vse32.v v8, (a0) + sh2add a0, t0, a0 + bnez a3, 1b + + ret +endfunc + func ff_vector_fmul_reverse_fixed_rvv, zve32x csrwi vxrm, 0 vsetvli t0, zero, e16, m4, ta, ma