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[79.124.17.100]) by mx.google.com with ESMTP id a640c23a62f3a-a5a17946211si308206766b.82.2024.05.11.07.42.02; Sat, 11 May 2024 07:42:02 -0700 (PDT) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 677BC68CF80; Sat, 11 May 2024 17:41:59 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from ursule.remlab.net (vps-a2bccee9.vps.ovh.net [51.75.19.47]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 259AA68CF80 for ; Sat, 11 May 2024 17:41:53 +0300 (EEST) Received: from basile.remlab.net (localhost [IPv6:::1]) by ursule.remlab.net (Postfix) with ESMTP id 80AA0C006B for ; Sat, 11 May 2024 17:41:52 +0300 (EEST) From: =?utf-8?q?R=C3=A9mi_Denis-Courmont?= To: ffmpeg-devel@ffmpeg.org Date: Sat, 11 May 2024 17:41:52 +0300 Message-ID: <20240511144152.50792-1-remi@remlab.net> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCH] lavu/riscv: fallback to raw hwprobe() system call X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: bJ/OWNQJ/U89 Not all C run-times support this, and even then, it will be a while before distributions provide recent enough versions thereof. Since this is a trivial system call wrapper, we might just as well call the corresponding kernel system call directly where the C run-time lacks support but the kernel headers are new enough (as is the case on Debian Unstable at the time of writing). In doing so, we need to add a few more guards as the first suitable kernel (headers) release did not expose the V, Zba and Zbb extensions. --- configure | 2 ++ libavutil/riscv/cpu.c | 20 +++++++++++++++++++- 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/configure b/configure index 2193905a54..dd81e58f99 100755 --- a/configure +++ b/configure @@ -2273,6 +2273,7 @@ HAVE_LIST_PUB=" HEADERS_LIST=" arpa_inet_h + asm_hwprobe_h asm_types_h cdio_paranoia_h cdio_paranoia_paranoia_h @@ -5546,6 +5547,7 @@ elif enabled ppc; then elif enabled riscv; then + check_headers asm/hwprobe.h check_headers sys/hwprobe.h if test_cpp_condition stddef.h "__riscv_zbb"; then diff --git a/libavutil/riscv/cpu.c b/libavutil/riscv/cpu.c index 3cf4e25bc9..6755f0df69 100644 --- a/libavutil/riscv/cpu.c +++ b/libavutil/riscv/cpu.c @@ -31,12 +31,24 @@ #endif #if HAVE_SYS_HWPROBE_H #include +#elif HAVE_ASM_HWPROBE_H +#include +#include +#include + +static int __riscv_hwprobe(struct riscv_hwprobe *pairs, size_t pair_count, + size_t cpu_count, unsigned long *cpus, + unsigned int flags) +{ + return syscall(__NR_riscv_hwprobe, pairs, pair_count, cpu_count, cpus, + flags); +} #endif int ff_get_cpu_flags_riscv(void) { int ret = 0; -#if HAVE_SYS_HWPROBE_H +#if HAVE_SYS_HWPROBE_H || HAVE_ASM_HWPROBE_H struct riscv_hwprobe pairs[] = { { RISCV_HWPROBE_KEY_BASE_BEHAVIOR, 0 }, { RISCV_HWPROBE_KEY_IMA_EXT_0, 0 }, @@ -47,13 +59,19 @@ int ff_get_cpu_flags_riscv(void) ret |= AV_CPU_FLAG_RVI; if (pairs[1].value & RISCV_HWPROBE_IMA_FD) ret |= AV_CPU_FLAG_RVF | AV_CPU_FLAG_RVD; +#ifdef RISCV_HWPROBE_IMA_V if (pairs[1].value & RISCV_HWPROBE_IMA_V) ret |= AV_CPU_FLAG_RVV_I32 | AV_CPU_FLAG_RVV_I64 | AV_CPU_FLAG_RVV_F32 | AV_CPU_FLAG_RVV_F64; +#endif +#ifdef RISCV_HWPROBE_EXT_ZBA if (pairs[1].value & RISCV_HWPROBE_EXT_ZBA) ret |= AV_CPU_FLAG_RVB_ADDR; +#endif +#ifdef RISCV_HWPROBE_EXT_ZBB if (pairs[1].value & RISCV_HWPROBE_EXT_ZBB) ret |= AV_CPU_FLAG_RVB_BASIC; +#endif #ifdef RISCV_HWPROBE_EXT_ZVBB if (pairs[1].value & RISCV_HWPROBE_EXT_ZVBB) ret |= AV_CPU_FLAG_RV_ZVBB;