diff --git a/libavcodec/riscv/Makefile b/libavcodec/riscv/Makefile
index 319ea6427b..1b52d60dbf 100644
--- a/libavcodec/riscv/Makefile
+++ b/libavcodec/riscv/Makefile
@@ -53,6 +53,7 @@ RVV-OBJS-$(CONFIG_RV34DSP) += riscv/rv34dsp_rvv.o
 OBJS-$(CONFIG_RV40_DECODER) += riscv/rv40dsp_init.o
 RVV-OBJS-$(CONFIG_RV40_DECODER) += riscv/rv40dsp_rvv.o
 RV-OBJS-$(CONFIG_STARTCODE) += riscv/startcode_rvb.o
+RVV-OBJS-$(CONFIG_STARTCODE) += riscv/startcode_rvv.o
 OBJS-$(CONFIG_SVQ1_ENCODER) += riscv/svqenc_init.o
 RVV-OBJS-$(CONFIG_SVQ1_ENCODER) += riscv/svqenc_rvv.o
 OBJS-$(CONFIG_TAK_DECODER) += riscv/takdsp_init.o
diff --git a/libavcodec/riscv/h264dsp_init.c b/libavcodec/riscv/h264dsp_init.c
index 60c84734cd..d5984f1805 100644
--- a/libavcodec/riscv/h264dsp_init.c
+++ b/libavcodec/riscv/h264dsp_init.c
@@ -27,6 +27,7 @@
 #include "libavcodec/h264dsp.h"
 
 extern int ff_startcode_find_candidate_rvb(const uint8_t *, int);
+extern int ff_startcode_find_candidate_rvv(const uint8_t *, int);
 
 av_cold void ff_h264dsp_init_riscv(H264DSPContext *dsp, const int bit_depth,
                                    const int chroma_format_idc)
@@ -36,5 +37,7 @@ av_cold void ff_h264dsp_init_riscv(H264DSPContext *dsp, const int bit_depth,
 
     if (flags & AV_CPU_FLAG_RVB_BASIC)
         dsp->startcode_find_candidate = ff_startcode_find_candidate_rvb;
+    if (flags & AV_CPU_FLAG_RVV_I32)
+        dsp->startcode_find_candidate = ff_startcode_find_candidate_rvv;
 #endif
 }
diff --git a/libavcodec/riscv/startcode_rvv.S b/libavcodec/riscv/startcode_rvv.S
new file mode 100644
index 0000000000..7c43b1d7f3
--- /dev/null
+++ b/libavcodec/riscv/startcode_rvv.S
@@ -0,0 +1,44 @@
+/*
+ * Copyright © 2024 Rémi Denis-Courmont.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "libavutil/riscv/asm.S"
+
+func ff_startcode_find_candidate_rvv, zve32x
+        mv       t0, a0
+1:
+        vsetvli  t1, a1, e8, m8, ta, ma
+        vle8.v   v8, (t0)
+        sub      a1, a1, t1
+        vmseq.vi v0, v8, 0
+        vfirst.m t2, v0
+        bgez     t2, 2f
+        add      t0, t0, t1
+        bnez     a1, 1b
+2:
+        add      t0, t0, t2
+        sub      a0, t0, a0
+        ret
+endfunc
diff --git a/libavcodec/riscv/vc1dsp_init.c b/libavcodec/riscv/vc1dsp_init.c
index 7868091978..03357e262b 100644
--- a/libavcodec/riscv/vc1dsp_init.c
+++ b/libavcodec/riscv/vc1dsp_init.c
@@ -30,6 +30,7 @@ void ff_vc1_inv_trans_4x8_dc_rvv(uint8_t *dest, ptrdiff_t stride, int16_t *block
 void ff_vc1_inv_trans_8x4_dc_rvv(uint8_t *dest, ptrdiff_t stride, int16_t *block);
 void ff_vc1_inv_trans_4x4_dc_rvv(uint8_t *dest, ptrdiff_t stride, int16_t *block);
 int ff_startcode_find_candidate_rvb(const uint8_t *, int);
+int ff_startcode_find_candidate_rvv(const uint8_t *, int);
 
 av_cold void ff_vc1dsp_init_riscv(VC1DSPContext *dsp)
 {
@@ -39,13 +40,16 @@ av_cold void ff_vc1dsp_init_riscv(VC1DSPContext *dsp)
     if (flags & AV_CPU_FLAG_RVB_BASIC)
         dsp->startcode_find_candidate = ff_startcode_find_candidate_rvb;
 # if HAVE_RVV
-    if (flags & AV_CPU_FLAG_RVV_I32 && ff_get_rv_vlenb() >= 16) {
-        dsp->vc1_inv_trans_4x8_dc = ff_vc1_inv_trans_4x8_dc_rvv;
-        dsp->vc1_inv_trans_4x4_dc = ff_vc1_inv_trans_4x4_dc_rvv;
-        if (flags & AV_CPU_FLAG_RVV_I64) {
-            dsp->vc1_inv_trans_8x8_dc = ff_vc1_inv_trans_8x8_dc_rvv;
-            dsp->vc1_inv_trans_8x4_dc = ff_vc1_inv_trans_8x4_dc_rvv;
+    if (flags & AV_CPU_FLAG_RVV_I32) {
+        if (ff_get_rv_vlenb() >= 16) {
+            dsp->vc1_inv_trans_4x8_dc = ff_vc1_inv_trans_4x8_dc_rvv;
+            dsp->vc1_inv_trans_4x4_dc = ff_vc1_inv_trans_4x4_dc_rvv;
+            if (flags & AV_CPU_FLAG_RVV_I64) {
+                dsp->vc1_inv_trans_8x8_dc = ff_vc1_inv_trans_8x8_dc_rvv;
+                dsp->vc1_inv_trans_8x4_dc = ff_vc1_inv_trans_8x4_dc_rvv;
+            }
         }
+        dsp->startcode_find_candidate = ff_startcode_find_candidate_rvv;
     }
 # endif
 #endif
