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[79.124.17.100]) by mx.google.com with ESMTP id a640c23a62f3a-a5a1ba0e0d8si494929566b.440.2024.05.13.08.52.35; Mon, 13 May 2024 08:52:36 -0700 (PDT) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id BE95668D5EB; Mon, 13 May 2024 18:52:32 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from ursule.remlab.net (vps-a2bccee9.vps.ovh.net [51.75.19.47]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 83ECA68D3DD for ; Mon, 13 May 2024 18:52:25 +0300 (EEST) Received: from basile.remlab.net (localhost [IPv6:::1]) by ursule.remlab.net (Postfix) with ESMTP id AFF21C0069 for ; Mon, 13 May 2024 18:52:24 +0300 (EEST) From: =?utf-8?q?R=C3=A9mi_Denis-Courmont?= To: ffmpeg-devel@ffmpeg.org Date: Mon, 13 May 2024 18:52:24 +0300 Message-ID: <20240513155224.18159-1-remi@remlab.net> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCH] lavc/flacdsp: fix CPU requirement for 32-bit LPC X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: o0O6ktGJ6R8y --- libavcodec/riscv/flacdsp_init.c | 13 ++++++------- libavcodec/riscv/flacdsp_rvv.S | 4 ++-- 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/libavcodec/riscv/flacdsp_init.c b/libavcodec/riscv/flacdsp_init.c index 0d7cff8bfe..77ffd09244 100644 --- a/libavcodec/riscv/flacdsp_init.c +++ b/libavcodec/riscv/flacdsp_init.c @@ -71,21 +71,20 @@ av_cold void ff_flacdsp_init_riscv(FLACDSPContext *c, enum AVSampleFormat fmt, if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR)) { int vlenb = ff_get_rv_vlenb(); - if (vlenb >= 16) { + if (vlenb >= 16) c->lpc16 = ff_flac_lpc16_rvv; + + c->wasted32 = ff_flac_wasted32_rvv; + # if (__riscv_xlen >= 64) + if (flags & AV_CPU_FLAG_RVV_I64) { if (vlenb > 16) c->lpc32 = ff_flac_lpc32_rvv_simple; else c->lpc32 = ff_flac_lpc32_rvv; -# endif - } - c->wasted32 = ff_flac_wasted32_rvv; - -# if (__riscv_xlen >= 64) - if (flags & AV_CPU_FLAG_RVV_I64) c->wasted33 = ff_flac_wasted33_rvv; + } switch (fmt) { case AV_SAMPLE_FMT_S16: diff --git a/libavcodec/riscv/flacdsp_rvv.S b/libavcodec/riscv/flacdsp_rvv.S index 5e5f4e7b64..8b9c626198 100644 --- a/libavcodec/riscv/flacdsp_rvv.S +++ b/libavcodec/riscv/flacdsp_rvv.S @@ -44,7 +44,7 @@ func ff_flac_lpc16_rvv, zve32x endfunc #if (__riscv_xlen == 64) -func ff_flac_lpc32_rvv, zve32x +func ff_flac_lpc32_rvv, zve64x addi t2, a2, -16 ble t2, zero, ff_flac_lpc32_rvv_simple vsetivli zero, 1, e64, m1, ta, ma @@ -75,7 +75,7 @@ func ff_flac_lpc32_rvv, zve32x ret endfunc -func ff_flac_lpc32_rvv_simple, zve32x +func ff_flac_lpc32_rvv_simple, zve64x vsetivli zero, 1, e64, m1, ta, ma vmv.s.x v0, zero vsetvli zero, a2, e32, m4, ta, ma