From patchwork Tue May 14 20:14:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?R=C3=A9mi_Denis-Courmont?= X-Patchwork-Id: 48885 Delivered-To: ffmpegpatchwork2@gmail.com Received: by 2002:a05:6a21:3a48:b0:1af:fc2d:ff5a with SMTP id zu8csp1190326pzb; Tue, 14 May 2024 13:14:41 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXqVol3j0gwQj2ySAgfgHaRQbzxsAhhdZg8ifADo5KbWongm0Tamu2v3Yuxgg5x2ar8hBU662LYKOOEb9gJeo5i89/D5D4u71Ac4A== X-Google-Smtp-Source: AGHT+IEf38fXTtt83HjSqia4rUofhTqdkBJFBTjRwNmmmh7v2YJZ0uZ445WC8aN1ndle985huwEB X-Received: by 2002:a17:907:9405:b0:a5a:542d:ae0a with SMTP id a640c23a62f3a-a5a542daf06mr792357466b.63.1715717681064; Tue, 14 May 2024 13:14:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715717681; cv=none; d=google.com; s=arc-20160816; b=M5OhYOSoPN++DzFtDtENP+Er+yKs0F33MaHs8AOPWccnL/Q/KHzxXiUvL5M/V4gr3c mb4KUjibwXnePl0IB+O5JtajUeg9S0quDRuv6jiSLG17RyLxrFk6ruWn2b1zLNcZBYSC 2bZMG9eF8EKm/dTPoIFFYl2ULfbtaoNi7VW17sMje12Y9y12P3TLaV1nMQt8e+jj+cLF UUGmf6/LWzuKtvhR26lX+yMr3Rw6EEle1CUL1eN77vZPkrVlSVs6nOHJ2fYDFZvBpZZi yZe6X7AqBuFo38AF3sj1ZXK9FrZxh1uiJooRixeUfvwNGiC3aRiWCJFeoWSZaCc1xFpA vhfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:reply-to:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:subject:mime-version:message-id:date:to:from :delivered-to; bh=hwNyxqbRCiqtwC5qknDJ/1kpet0tMW+wXKmwVHstVlg=; fh=YOA8vD9MJZuwZ71F/05pj6KdCjf6jQRmzLS+CATXUQk=; b=FMXgxOLsVHIxQ11dq62pt7gpj07k/e5dpu13G9rd29VtU5xzGCr9YD1wy+brpn0+sD XzaC+6XrVnc+EayU2+Cx8QcQP9yuY3sK6pHq++vje3myj6Vzt59/dUO9L/DSw56oz1BZ YyjnbeZT2J2ZdLl01+5DTEA+m3PgaFzsMBE91u5MBF83Fwi3wI7l1lJ1kZJ79QJ2m0Fe B7mDDSwkTj7KbYqSFoX8mTEzgMNqgunHMiPu4Dg816HjYOG2WNJmE9vyJVnIJPcxFBnF H8/dqNMZH/ToOQL4FfEf272aRR3hc5nsH+8ri0PgtpaH0dITgVzzQuUkKzWqjdF+Bz54 GRTQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Return-Path: Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org. [79.124.17.100]) by mx.google.com with ESMTP id a640c23a62f3a-a5a513a7340si397682166b.989.2024.05.14.13.14.40; Tue, 14 May 2024 13:14:41 -0700 (PDT) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 89CBD68D752; Tue, 14 May 2024 23:14:37 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from ursule.remlab.net (vps-a2bccee9.vps.ovh.net [51.75.19.47]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 2963968CCE0 for ; Tue, 14 May 2024 23:14:30 +0300 (EEST) Received: from basile.remlab.net (localhost [IPv6:::1]) by ursule.remlab.net (Postfix) with ESMTP id AAE92C00A2 for ; Tue, 14 May 2024 23:14:29 +0300 (EEST) From: =?utf-8?q?R=C3=A9mi_Denis-Courmont?= To: ffmpeg-devel@ffmpeg.org Date: Tue, 14 May 2024 23:14:29 +0300 Message-ID: <20240514201429.34581-1-remi@remlab.net> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCH] lavu/riscv: fix parsing the unaligned read capability X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: AFdjjygPXyzm Pointed-out-by: Stefan O'Rear --- libavutil/riscv/cpu.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/libavutil/riscv/cpu.c b/libavutil/riscv/cpu.c index 7b8aa7ac21..04ac404bbf 100644 --- a/libavutil/riscv/cpu.c +++ b/libavutil/riscv/cpu.c @@ -77,8 +77,12 @@ int ff_get_cpu_flags_riscv(void) if (pairs[1].value & RISCV_HWPROBE_EXT_ZVBB) ret |= AV_CPU_FLAG_RV_ZVBB; #endif - if (pairs[2].value & RISCV_HWPROBE_MISALIGNED_FAST) - ret |= AV_CPU_FLAG_RV_MISALIGNED; + switch (pairs[2].value & RISCV_HWPROBE_MISALIGNED_MASK) { + case RISCV_HWPROBE_MISALIGNED_FAST: + ret |= AV_CPU_FLAG_RV_MISALIGNED; + break; + default: + } } #elif HAVE_GETAUXVAL {