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[79.124.17.100]) by mx.google.com with ESMTP id 4fb4d7f45d1cf-57c805fef16si1593053a12.433.2024.06.10.13.24.02; Mon, 10 Jun 2024 13:24:02 -0700 (PDT) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id B9E6268D7E2; Mon, 10 Jun 2024 23:23:33 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from ursule.remlab.net (vps-a2bccee9.vps.ovh.net [51.75.19.47]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id CEC3F68D711 for ; Mon, 10 Jun 2024 23:23:23 +0300 (EEST) Received: from basile.remlab.net (localhost [IPv6:::1]) by ursule.remlab.net (Postfix) with ESMTP id 11355C02F9 for ; Mon, 10 Jun 2024 23:23:23 +0300 (EEST) From: =?utf-8?q?R=C3=A9mi_Denis-Courmont?= To: ffmpeg-devel@ffmpeg.org Date: Mon, 10 Jun 2024 23:23:22 +0300 Message-ID: <20240610202322.786800-4-remi@remlab.net> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240610202322.786800-1-remi@remlab.net> References: <20240610202322.786800-1-remi@remlab.net> MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCHv4 4/4] lavc/h263dsp: R-V V dct_unquantize_{intra, inter} X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: erNEeYZ4Pkdz T-Head C908: h263dsp.dct_unquantize_inter_c: 3.7 h263dsp.dct_unquantize_inter_rvv_i32: 1.7 h263dsp.dct_unquantize_intra_c: 4.0 h263dsp.dct_unquantize_intra_rvv_i32: 2.0 SpacemiT X60: h263dsp.dct_unquantize_inter_c: 3.5 h263dsp.dct_unquantize_inter_rvv_i32: 1.5 h263dsp.dct_unquantize_intra_c: 3.5 h263dsp.dct_unquantize_intra_rvv_i32: 1.5 --- libavcodec/riscv/h263dsp_init.c | 15 ++++++++++++--- libavcodec/riscv/h263dsp_rvv.S | 26 ++++++++++++++++++++++++++ 2 files changed, 38 insertions(+), 3 deletions(-) diff --git a/libavcodec/riscv/h263dsp_init.c b/libavcodec/riscv/h263dsp_init.c index 21b536366c..5fb12f360b 100644 --- a/libavcodec/riscv/h263dsp_init.c +++ b/libavcodec/riscv/h263dsp_init.c @@ -25,6 +25,8 @@ #include "libavutil/riscv/cpu.h" #include "libavcodec/h263dsp.h" +void ff_h263_dct_unquantize_intra_rvv(int16_t *, size_t len, int, int); +void ff_h263_dct_unquantize_inter_rvv(int16_t *, size_t len, int, int); void ff_h263_h_loop_filter_rvv(uint8_t *src, int stride, int q); void ff_h263_v_loop_filter_rvv(uint8_t *src, int stride, int q); @@ -33,9 +35,16 @@ av_cold void ff_h263dsp_init_riscv(H263DSPContext *c) #if HAVE_RVV int flags = av_get_cpu_flags(); - if ((flags & AV_CPU_FLAG_RVV_I32) && ff_rv_vlen_least(128)) { - c->h263_h_loop_filter = ff_h263_h_loop_filter_rvv; - c->h263_v_loop_filter = ff_h263_v_loop_filter_rvv; + if (flags & AV_CPU_FLAG_RVV_I32) { + if (ff_rv_vlen_least(128) || (flags & AV_CPU_FLAG_RVB_ADDR)) { + c->h263_dct_unquantize_intra = ff_h263_dct_unquantize_intra_rvv; + c->h263_dct_unquantize_inter = ff_h263_dct_unquantize_inter_rvv; + } + + if (ff_rv_vlen_least(128)) { + c->h263_h_loop_filter = ff_h263_h_loop_filter_rvv; + c->h263_v_loop_filter = ff_h263_v_loop_filter_rvv; + } } #endif } diff --git a/libavcodec/riscv/h263dsp_rvv.S b/libavcodec/riscv/h263dsp_rvv.S index 97503d527c..78847b9d44 100644 --- a/libavcodec/riscv/h263dsp_rvv.S +++ b/libavcodec/riscv/h263dsp_rvv.S @@ -20,6 +20,32 @@ #include "libavutil/riscv/asm.S" +func ff_h263_dct_unquantize_intra_rvv, zve32x + addi a0, a0, 2 + j 1f +endfunc + +func ff_h263_dct_unquantize_inter_rvv, zve32x + addi a1, a1, 1 +1: + vsetvli t0, a1, e16, m8, ta, mu + vle16.v v8, (a0) + sub a1, a1, t0 + vmv.v.x v24, a3 + vmslt.vi v0, v8, 0 + vmul.vx v16, v8, a2 + vneg.v v24, v24, v0.t + vmsne.vi v0, v8, 0 + vadd.vv v8, v16, v24, v0.t + vse16.v v8, (a0) +#if defined(__riscv_v_min_vlen) && __riscv_v_min_vlen < 128 + sh1add a0, t0, a0 + bnez a1, 1b +#endif + + ret +endfunc + .option push .option norelax func ff_h263_h_loop_filter_rvv, zve32x