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[FFmpeg-devel] checkasm/riscv: print official extension names

Message ID 20240901133608.94598-1-remi@remlab.net
State New
Headers show
Series [FFmpeg-devel] checkasm/riscv: print official extension names | expand

Checks

Context Check Description
yinshiyou/make_loongarch64 success Make finished
yinshiyou/make_fate_loongarch64 success Make fate finished
andriy/make_x86 success Make finished
andriy/make_fate_x86 success Make fate finished

Commit Message

Rémi Denis-Courmont Sept. 1, 2024, 1:36 p.m. UTC 
---
 tests/checkasm/checkasm.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/tests/checkasm/checkasm.c b/tests/checkasm/checkasm.c
index 965e1f5a2e..73a998ae3a 100644
--- a/tests/checkasm/checkasm.c
+++ b/tests/checkasm/checkasm.c
@@ -320,13 +320,13 @@  static const struct {
 #elif ARCH_RISCV
     { "RVI",      "rvi",      AV_CPU_FLAG_RVI },
     { "misaligned", "misaligned", AV_CPU_FLAG_RV_MISALIGNED },
-    { "RVBbasic", "rvb_b",    AV_CPU_FLAG_RVB_BASIC },
+    { "RV_zbb",   "rvb_b",    AV_CPU_FLAG_RVB_BASIC },
     { "RVB",      "rvb",      AV_CPU_FLAG_RVB },
-    { "RVVi32",   "rvv_i32",  AV_CPU_FLAG_RVV_I32 },
-    { "RVVf32",   "rvv_f32",  AV_CPU_FLAG_RVV_F32 },
-    { "RVVi64",   "rvv_i64",  AV_CPU_FLAG_RVV_I64 },
-    { "RVVf64",   "rvv_f64",  AV_CPU_FLAG_RVV_F64 },
-    { "RV_Zvbb",  "rv_zvbb",  AV_CPU_FLAG_RV_ZVBB },
+    { "RV_zve32x","rvv_i32",  AV_CPU_FLAG_RVV_I32 },
+    { "RV_zve32f","rvv_f32",  AV_CPU_FLAG_RVV_F32 },
+    { "RV_zve64x","rvv_i64",  AV_CPU_FLAG_RVV_I64 },
+    { "RV_zve64d","rvv_f64",  AV_CPU_FLAG_RVV_F64 },
+    { "RV_zvbb",  "rv_zvbb",  AV_CPU_FLAG_RV_ZVBB },
 #elif ARCH_MIPS
     { "MMI",      "mmi",      AV_CPU_FLAG_MMI },
     { "MSA",      "msa",      AV_CPU_FLAG_MSA },