From patchwork Tue Oct 24 11:21:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manojkumar Bhosale X-Patchwork-Id: 5677 Delivered-To: ffmpegpatchwork@gmail.com Received: by 10.2.161.90 with SMTP id m26csp517067jah; Tue, 24 Oct 2017 04:37:09 -0700 (PDT) X-Google-Smtp-Source: ABhQp+QuiIH6mq7X0AJkEbboH9qXXiFAD7NMevdw3hiWccI1WQPA4mtOKGtRwSC4aOu91ST92JxW X-Received: by 10.28.24.70 with SMTP id 67mr1582753wmy.7.1508845029784; Tue, 24 Oct 2017 04:37:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508845029; cv=none; d=google.com; s=arc-20160816; b=X86B23VC0m+oDUt9EJ8jJDqbsyorRNaE3cd3vcG5IdJ9wQVnwCLqX/ThXRHAzuAn7A WJzqUKeKuJrnM2GybzVmPuRfS4v5JO9HHJrAfrVJD8Y32SKNG/vWBMXYyhZIq0bxFlep k3/ZezlLRlqDNyTVcp6/W9wey4mR1kzDFZ9jAJl3heaqLKmBqB2PBKvWh601EOwehGe2 9wBqvAAbs0stqUiGDRhYDTQ+Gb9Y2HrGermkcm4GJwc4+E98yK1hLl6ijdcPUrUWQwJ2 nQeEcCwdJN7qfysrPjktsbOUP89yDKy+jQRqzKM0ThVP54w5G3yBwJAPv4OE/LGodR9K WotQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:reply-to :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:mime-version:content-language :accept-language:in-reply-to:references:message-id:date:thread-index :thread-topic:to:from:delivered-to:arc-authentication-results; bh=9dTfE/0B1fLvioqUKRSLfrm2yir/bpP1Bdpa7svKePs=; b=ARCK4qzv7quoCmeASdfYFAhLUfiL7PHQ9HwvWweR0FyXi/5kv8OLgUpeSr/TtMSn6e w+D/1JkaiusFN0ARI+6spJplrzQ+VLdCW8DOHTQil6uyRT3y5+U07dQBv41h24gxLIhR 6FGAfoAk1iTGkKH8qSKCDYrzNWyBnPhx9tX2buAtr6DHZiuA/q64+01ZrOWaohQD6JpZ bt2ThJKaG5HLyFtiv2E1VuZkaAaVqmIKwiGAbFM1F/Tnsfg4kbkp5Ugblyo2G5Wtu9DS WqRiV6eWPglx1XHEFF0spUzh0cY3gT7YX/4xbwGq1E16QZrH4VB1RKgVrhmDjPjhugmC /fJw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Return-Path: Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org. [79.124.17.100]) by mx.google.com with ESMTP id v11si70798wrv.237.2017.10.24.04.37.09; Tue, 24 Oct 2017 04:37:09 -0700 (PDT) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 8017968A2AF; Tue, 24 Oct 2017 14:37:00 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from mailapp01.imgtec.com (mailapp01.imgtec.com [195.59.15.196]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id C27E86898A9 for ; Tue, 24 Oct 2017 14:36:53 +0300 (EEST) Received: from HHMAIL01.hh.imgtec.org (unknown [10.100.10.19]) by Forcepoint Email with ESMTPS id DC4AAE4D60D79 for ; Tue, 24 Oct 2017 12:21:22 +0100 (IST) Received: from PUMAIL01.pu.imgtec.org (192.168.91.250) by HHMAIL01.hh.imgtec.org (10.100.10.19) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 24 Oct 2017 12:21:25 +0100 Received: from PUMAIL01.pu.imgtec.org ([::1]) by PUMAIL01.pu.imgtec.org ([::1]) with mapi id 14.03.0266.001; Tue, 24 Oct 2017 16:51:22 +0530 From: Manojkumar Bhosale To: FFmpeg development discussions and patches Thread-Topic: [FFmpeg-devel] [PATCH] avcodec/mips: Improve avc put mc 11, 31, 13 and 33 msa functions Thread-Index: AQHTTJb0RBjY9Okik0aQJ8RhVJppcKLy2zcA Date: Tue, 24 Oct 2017 11:21:21 +0000 Message-ID: <70293ACCC3BA6A4E81FFCA024C7A86E1E0595AEC@PUMAIL01.pu.imgtec.org> References: <1508828910-20434-1-git-send-email-kaustubh.raste@imgtec.com> In-Reply-To: <1508828910-20434-1-git-send-email-kaustubh.raste@imgtec.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [192.168.91.86] MIME-Version: 1.0 Subject: Re: [FFmpeg-devel] [PATCH] avcodec/mips: Improve avc put mc 11, 31, 13 and 33 msa functions X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Cc: Kaustubh Raste Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" LGTM -----Original Message----- From: ffmpeg-devel [mailto:ffmpeg-devel-bounces@ffmpeg.org] On Behalf Of kaustubh.raste@imgtec.com Sent: Tuesday, October 24, 2017 12:39 PM To: ffmpeg-devel@ffmpeg.org Cc: Kaustubh Raste Subject: [FFmpeg-devel] [PATCH] avcodec/mips: Improve avc put mc 11, 31, 13 and 33 msa functions From: Kaustubh Raste Remove loops and unroll as block sizes are known. Signed-off-by: Kaustubh Raste --- libavcodec/mips/h264qpel_msa.c | 400 ++++++++++++++++++++++++---------------- 1 file changed, 240 insertions(+), 160 deletions(-) XORI_B4_128_SB(src_vt0, src_vt1, src_vt2, src_vt3); - for (loop_cnt = (height >> 2); loop_cnt--;) { - LD_SB4(src_x, src_stride, src_hz0, src_hz1, src_hz2, src_hz3); - src_x += (4 * src_stride); - - XORI_B4_128_SB(src_hz0, src_hz1, src_hz2, src_hz3); - - hz_out0 = AVC_XOR_VSHF_B_AND_APPLY_6TAP_HORIZ_FILT_SH(src_hz0, - src_hz1, mask0, - mask1, mask2); - hz_out1 = AVC_XOR_VSHF_B_AND_APPLY_6TAP_HORIZ_FILT_SH(src_hz2, - src_hz3, mask0, - mask1, mask2); - - SRARI_H2_SH(hz_out0, hz_out1, 5); - SAT_SH2_SH(hz_out0, hz_out1, 7); - - LD_SB4(src_y, src_stride, src_vt5, src_vt6, src_vt7, src_vt8); - src_y += (4 * src_stride); - - src_vt4 = (v16i8) __msa_insve_w((v4i32) src_vt4, 1, (v4i32) src_vt5); - src_vt5 = (v16i8) __msa_insve_w((v4i32) src_vt5, 1, (v4i32) src_vt6); - src_vt6 = (v16i8) __msa_insve_w((v4i32) src_vt6, 1, (v4i32) src_vt7); - src_vt7 = (v16i8) __msa_insve_w((v4i32) src_vt7, 1, (v4i32) src_vt8); - - XORI_B4_128_SB(src_vt4, src_vt5, src_vt6, src_vt7); + LD_SB4(src_x, stride, src_hz0, src_hz1, src_hz2, src_hz3); + XORI_B4_128_SB(src_hz0, src_hz1, src_hz2, src_hz3); + hz_out0 = AVC_HORZ_FILTER_SH(src_hz0, src_hz1, mask0, mask1, mask2); + hz_out1 = AVC_HORZ_FILTER_SH(src_hz2, src_hz3, mask0, mask1, + mask2); - /* filter calc */ - vert_out0 = AVC_CALC_DPADD_B_6PIX_2COEFF_R_SH(src_vt0, src_vt1, - src_vt2, src_vt3, - src_vt4, src_vt5); - vert_out1 = AVC_CALC_DPADD_B_6PIX_2COEFF_R_SH(src_vt2, src_vt3, - src_vt4, src_vt5, - src_vt6, src_vt7); + SRARI_H2_SH(hz_out0, hz_out1, 5); + SAT_SH2_SH(hz_out0, hz_out1, 7); - SRARI_H2_SH(vert_out0, vert_out1, 5); - SAT_SH2_SH(vert_out0, vert_out1, 7); + LD_SB4(src_y, stride, src_vt5, src_vt6, src_vt7, src_vt8); - out0 = __msa_srari_h((hz_out0 + vert_out0), 1); - out1 = __msa_srari_h((hz_out1 + vert_out1), 1); + src_vt4 = (v16i8) __msa_insve_w((v4i32) src_vt4, 1, (v4i32) src_vt5); + src_vt5 = (v16i8) __msa_insve_w((v4i32) src_vt5, 1, (v4i32) src_vt6); + src_vt6 = (v16i8) __msa_insve_w((v4i32) src_vt6, 1, (v4i32) src_vt7); + src_vt7 = (v16i8) __msa_insve_w((v4i32) src_vt7, 1, (v4i32) + src_vt8); - SAT_SH2_SH(out0, out1, 7); - out = PCKEV_XORI128_UB(out0, out1); - ST4x4_UB(out, out, 0, 1, 2, 3, dst, dst_stride); - dst += (4 * dst_stride); + XORI_B4_128_SB(src_vt4, src_vt5, src_vt6, src_vt7); + ILVR_B2_SB(src_vt1, src_vt0, src_vt3, src_vt2, src_vt10_r, src_vt32_r); + ILVR_B2_SB(src_vt5, src_vt4, src_vt7, src_vt6, src_vt54_r, src_vt76_r); + vt_out0 = AVC_DOT_SH3_SH(src_vt10_r, src_vt32_r, src_vt54_r, filt0, filt1, + filt2); + vt_out1 = AVC_DOT_SH3_SH(src_vt32_r, src_vt54_r, src_vt76_r, filt0, filt1, + filt2); + SRARI_H2_SH(vt_out0, vt_out1, 5); + SAT_SH2_SH(vt_out0, vt_out1, 7); + + out0 = __msa_srari_h((hz_out0 + vt_out0), 1); + out1 = __msa_srari_h((hz_out1 + vt_out1), 1); - src_vt3 = src_vt7; - src_vt1 = src_vt5; - src_vt0 = src_vt4; - src_vt4 = src_vt8; - src_vt2 = src_vt6; - } + SAT_SH2_SH(out0, out1, 7); + out = PCKEV_XORI128_UB(out0, out1); + ST4x4_UB(out, out, 0, 1, 2, 3, dst, stride); } -static void avc_luma_hv_qrt_8w_msa(const uint8_t *src_x, const uint8_t *src_y, - int32_t src_stride, uint8_t *dst, - int32_t dst_stride, int32_t height) +static void avc_luma_hv_qrt_8x8_msa(const uint8_t *src_x, const uint8_t *src_y, + uint8_t *dst, int32_t stride) { - uint32_t loop_cnt; - v16i8 src_hz0, src_hz1, src_hz2, src_hz3; - v16i8 src_vt0, src_vt1, src_vt2, src_vt3, src_vt4; - v16i8 src_vt5, src_vt6, src_vt7, src_vt8; - v16i8 mask0, mask1, mask2; - v8i16 hz_out0, hz_out1, hz_out2, hz_out3; - v8i16 vert_out0, vert_out1, vert_out2, vert_out3; - v8i16 out0, out1, out2, out3; - v16u8 tmp0, tmp1; - - LD_SB3(&luma_mask_arr[0], 16, mask0, mask1, mask2); - LD_SB5(src_y, src_stride, src_vt0, src_vt1, src_vt2, src_vt3, src_vt4); - src_y += (5 * src_stride); - - src_vt0 = (v16i8) __msa_insve_d((v2i64) src_vt0, 1, (v2i64) src_vt1); - src_vt1 = (v16i8) __msa_insve_d((v2i64) src_vt1, 1, (v2i64) src_vt2); - src_vt2 = (v16i8) __msa_insve_d((v2i64) src_vt2, 1, (v2i64) src_vt3); - src_vt3 = (v16i8) __msa_insve_d((v2i64) src_vt3, 1, (v2i64) src_vt4); + const int16_t filt_const0 = 0xfb01; + const int16_t filt_const1 = 0x1414; + const int16_t filt_const2 = 0x1fb; + v16u8 out0, out1; + v16i8 src_hz0, src_hz1, src_hz2, src_hz3, mask0, mask1, mask2; + v16i8 src_vt0, src_vt1, src_vt2, src_vt3, src_vt4, src_vt5, src_vt6; + v16i8 src_vt7, src_vt8, src_vt9, src_vt10, src_vt11, src_vt12; + v16i8 src_vt10_r, src_vt21_r, src_vt32_r, src_vt43_r, src_vt54_r; + v16i8 src_vt65_r, src_vt76_r, src_vt87_r, src_vt98_r, src_vt109_r; + v16i8 src_vt1110_r, src_vt1211_r, filt0, filt1, filt2; + v8i16 hz_out0, hz_out1, hz_out2, hz_out3, vt_out0, vt_out1, vt_out2; + v8i16 vt_out3, tmp0, tmp1, tmp2, tmp3; - XORI_B4_128_SB(src_vt0, src_vt1, src_vt2, src_vt3); + filt0 = (v16i8) __msa_fill_h(filt_const0); + filt1 = (v16i8) __msa_fill_h(filt_const1); + filt2 = (v16i8) __msa_fill_h(filt_const2); - for (loop_cnt = (height >> 2); loop_cnt--;) { - LD_SB4(src_x, src_stride, src_hz0, src_hz1, src_hz2, src_hz3); - XORI_B4_128_SB(src_hz0, src_hz1, src_hz2, src_hz3); - src_x += (4 * src_stride); + LD_SB3(&luma_mask_arr[0], 16, mask0, mask1, mask2); + LD_SB5(src_y, stride, src_vt0, src_vt1, src_vt2, src_vt3, src_vt4); + src_y += (5 * stride); - hz_out0 = AVC_HORZ_FILTER_SH(src_hz0, src_hz0, mask0, mask1, mask2); - hz_out1 = AVC_HORZ_FILTER_SH(src_hz1, src_hz1, mask0, mask1, mask2); - hz_out2 = AVC_HORZ_FILTER_SH(src_hz2, src_hz2, mask0, mask1, mask2); - hz_out3 = AVC_HORZ_FILTER_SH(src_hz3, src_hz3, mask0, mask1, mask2); + XORI_B5_128_SB(src_vt0, src_vt1, src_vt2, src_vt3, src_vt4); - SRARI_H4_SH(hz_out0, hz_out1, hz_out2, hz_out3, 5); - SAT_SH4_SH(hz_out0, hz_out1, hz_out2, hz_out3, 7); + LD_SB4(src_x, stride, src_hz0, src_hz1, src_hz2, src_hz3); + XORI_B4_128_SB(src_hz0, src_hz1, src_hz2, src_hz3); + src_x += (4 * stride); + + hz_out0 = AVC_HORZ_FILTER_SH(src_hz0, src_hz0, mask0, mask1, mask2); + hz_out1 = AVC_HORZ_FILTER_SH(src_hz1, src_hz1, mask0, mask1, mask2); + hz_out2 = AVC_HORZ_FILTER_SH(src_hz2, src_hz2, mask0, mask1, mask2); + hz_out3 = AVC_HORZ_FILTER_SH(src_hz3, src_hz3, mask0, mask1, + mask2); + + SRARI_H4_SH(hz_out0, hz_out1, hz_out2, hz_out3, 5); + SAT_SH4_SH(hz_out0, hz_out1, hz_out2, hz_out3, 7); + + LD_SB4(src_y, stride, src_vt5, src_vt6, src_vt7, src_vt8); + src_y += (4 * stride); + XORI_B4_128_SB(src_vt5, src_vt6, src_vt7, src_vt8); + + ILVR_B4_SB(src_vt1, src_vt0, src_vt2, src_vt1, src_vt3, src_vt2, src_vt4, + src_vt3, src_vt10_r, src_vt21_r, src_vt32_r, src_vt43_r); + ILVR_B4_SB(src_vt5, src_vt4, src_vt6, src_vt5, src_vt7, src_vt6, src_vt8, + src_vt7, src_vt54_r, src_vt65_r, src_vt76_r, src_vt87_r); + vt_out0 = AVC_DOT_SH3_SH(src_vt10_r, src_vt32_r, src_vt54_r, filt0, filt1, + filt2); + vt_out1 = AVC_DOT_SH3_SH(src_vt21_r, src_vt43_r, src_vt65_r, filt0, filt1, + filt2); + vt_out2 = AVC_DOT_SH3_SH(src_vt32_r, src_vt54_r, src_vt76_r, filt0, filt1, + filt2); + vt_out3 = AVC_DOT_SH3_SH(src_vt43_r, src_vt65_r, src_vt87_r, filt0, filt1, + filt2); + SRARI_H4_SH(vt_out0, vt_out1, vt_out2, vt_out3, 5); + SAT_SH4_SH(vt_out0, vt_out1, vt_out2, vt_out3, 7); + + tmp0 = __msa_srari_h((hz_out0 + vt_out0), 1); + tmp1 = __msa_srari_h((hz_out1 + vt_out1), 1); + tmp2 = __msa_srari_h((hz_out2 + vt_out2), 1); + tmp3 = __msa_srari_h((hz_out3 + vt_out3), 1); + + LD_SB4(src_x, stride, src_hz0, src_hz1, src_hz2, src_hz3); + XORI_B4_128_SB(src_hz0, src_hz1, src_hz2, src_hz3); - LD_SB4(src_y, src_stride, src_vt5, src_vt6, src_vt7, src_vt8); - src_y += (4 * src_stride); + SAT_SH4_SH(tmp0, tmp1, tmp2, tmp3, 7); + out0 = PCKEV_XORI128_UB(tmp0, tmp1); + out1 = PCKEV_XORI128_UB(tmp2, tmp3); + ST8x4_UB(out0, out1, dst, stride); + dst += (4 * stride); - src_vt4 = (v16i8) __msa_insve_d((v2i64) src_vt4, 1, (v2i64) src_vt5); - src_vt5 = (v16i8) __msa_insve_d((v2i64) src_vt5, 1, (v2i64) src_vt6); - src_vt6 = (v16i8) __msa_insve_d((v2i64) src_vt6, 1, (v2i64) src_vt7); - src_vt7 = (v16i8) __msa_insve_d((v2i64) src_vt7, 1, (v2i64) src_vt8); + LD_SB4(src_y, stride, src_vt9, src_vt10, src_vt11, src_vt12); + XORI_B4_128_SB(src_vt9, src_vt10, src_vt11, src_vt12); + + hz_out0 = AVC_HORZ_FILTER_SH(src_hz0, src_hz0, mask0, mask1, mask2); + hz_out1 = AVC_HORZ_FILTER_SH(src_hz1, src_hz1, mask0, mask1, mask2); + hz_out2 = AVC_HORZ_FILTER_SH(src_hz2, src_hz2, mask0, mask1, mask2); + hz_out3 = AVC_HORZ_FILTER_SH(src_hz3, src_hz3, mask0, mask1, + mask2); + + SRARI_H4_SH(hz_out0, hz_out1, hz_out2, hz_out3, 5); + SAT_SH4_SH(hz_out0, hz_out1, hz_out2, hz_out3, 7); + + ILVR_B4_SB(src_vt9, src_vt8, src_vt10, src_vt9, src_vt11, src_vt10, + src_vt12, src_vt11, src_vt98_r, src_vt109_r, src_vt1110_r, + src_vt1211_r); + vt_out0 = AVC_DOT_SH3_SH(src_vt54_r, src_vt76_r, src_vt98_r, filt0, filt1, + filt2); + vt_out1 = AVC_DOT_SH3_SH(src_vt65_r, src_vt87_r, src_vt109_r, filt0, filt1, + filt2); + vt_out2 = AVC_DOT_SH3_SH(src_vt76_r, src_vt98_r, src_vt1110_r, filt0, filt1, + filt2); + vt_out3 = AVC_DOT_SH3_SH(src_vt87_r, src_vt109_r, src_vt1211_r, filt0, + filt1, filt2); + SRARI_H4_SH(vt_out0, vt_out1, vt_out2, vt_out3, 5); + SAT_SH4_SH(vt_out0, vt_out1, vt_out2, vt_out3, 7); + + tmp0 = __msa_srari_h((hz_out0 + vt_out0), 1); + tmp1 = __msa_srari_h((hz_out1 + vt_out1), 1); + tmp2 = __msa_srari_h((hz_out2 + vt_out2), 1); + tmp3 = __msa_srari_h((hz_out3 + vt_out3), 1); + + SAT_SH4_SH(tmp0, tmp1, tmp2, tmp3, 7); + out0 = PCKEV_XORI128_UB(tmp0, tmp1); + out1 = PCKEV_XORI128_UB(tmp2, tmp3); + ST8x4_UB(out0, out1, dst, stride); + dst += (4 * stride); +} - XORI_B4_128_SB(src_vt4, src_vt5, src_vt6, src_vt7); +static void avc_luma_hv_qrt_16x16_msa(const uint8_t *src_x, + const uint8_t *src_y, uint8_t *dst, + int32_t stride) { + const int16_t filt_const0 = 0xfb01; + const int16_t filt_const1 = 0x1414; + const int16_t filt_const2 = 0x1fb; + const uint8_t *src_x_tmp = src_x; + const uint8_t *src_y_tmp = src_y; + uint8_t *dst_tmp = dst; + uint32_t multiple8_cnt, loop_cnt; + v16u8 tmp0, tmp1; + v16i8 src_hz0, src_hz1, src_hz2, src_hz3, mask0, mask1, mask2; + v16i8 src_vt0, src_vt1, src_vt2, src_vt3, src_vt4, src_vt5, src_vt6; + v16i8 src_vt7, src_vt8; + v16i8 src_vt10_r, src_vt21_r, src_vt32_r, src_vt43_r, src_vt54_r; + v16i8 src_vt65_r, src_vt76_r, src_vt87_r, filt0, filt1, filt2; + v8i16 hz_out0, hz_out1, hz_out2, hz_out3, vt_out0, vt_out1, vt_out2; + v8i16 vt_out3, out0, out1, out2, out3; - /* filter calc */ - AVC_CALC_DPADD_B_6PIX_2COEFF_SH(src_vt0, src_vt1, src_vt2, src_vt3, - src_vt4, src_vt5, vert_out0, vert_out1); - AVC_CALC_DPADD_B_6PIX_2COEFF_SH(src_vt2, src_vt3, src_vt4, src_vt5, - src_vt6, src_vt7, vert_out2, vert_out3); + filt0 = (v16i8) __msa_fill_h(filt_const0); + filt1 = (v16i8) __msa_fill_h(filt_const1); + filt2 = (v16i8) __msa_fill_h(filt_const2); - SRARI_H4_SH(vert_out0, vert_out1, vert_out2, vert_out3, 5); - SAT_SH4_SH(vert_out0, vert_out1, vert_out2, vert_out3, 7); + LD_SB3(&luma_mask_arr[0], 16, mask0, mask1, mask2); - out0 = __msa_srari_h((hz_out0 + vert_out0), 1); - out1 = __msa_srari_h((hz_out1 + vert_out1), 1); - out2 = __msa_srari_h((hz_out2 + vert_out2), 1); - out3 = __msa_srari_h((hz_out3 + vert_out3), 1); + for (multiple8_cnt = 2; multiple8_cnt--;) { + src_x = src_x_tmp; + src_y = src_y_tmp; + dst = dst_tmp; - SAT_SH4_SH(out0, out1, out2, out3, 7); - tmp0 = PCKEV_XORI128_UB(out0, out1); - tmp1 = PCKEV_XORI128_UB(out2, out3); - ST8x4_UB(tmp0, tmp1, dst, dst_stride); + LD_SB5(src_y, stride, src_vt0, src_vt1, src_vt2, src_vt3, src_vt4); + src_y += (5 * stride); - dst += (4 * dst_stride); - src_vt3 = src_vt7; - src_vt1 = src_vt5; - src_vt5 = src_vt4; - src_vt4 = src_vt8; - src_vt2 = src_vt6; - src_vt0 = src_vt5; - } -} + XORI_B5_128_SB(src_vt0, src_vt1, src_vt2, src_vt3, src_vt4); -static void avc_luma_hv_qrt_16w_msa(const uint8_t *src_x, const uint8_t *src_y, - int32_t src_stride, uint8_t *dst, - int32_t dst_stride, int32_t height) -{ - uint32_t multiple8_cnt; + for (loop_cnt = 4; loop_cnt--;) { + LD_SB4(src_x, stride, src_hz0, src_hz1, src_hz2, src_hz3); + XORI_B4_128_SB(src_hz0, src_hz1, src_hz2, src_hz3); + src_x += (4 * stride); + + hz_out0 = AVC_HORZ_FILTER_SH(src_hz0, src_hz0, mask0, mask1, mask2); + hz_out1 = AVC_HORZ_FILTER_SH(src_hz1, src_hz1, mask0, mask1, mask2); + hz_out2 = AVC_HORZ_FILTER_SH(src_hz2, src_hz2, mask0, mask1, mask2); + hz_out3 = AVC_HORZ_FILTER_SH(src_hz3, src_hz3, mask0, mask1, mask2); + SRARI_H4_SH(hz_out0, hz_out1, hz_out2, hz_out3, 5); + SAT_SH4_SH(hz_out0, hz_out1, hz_out2, hz_out3, 7); + + LD_SB4(src_y, stride, src_vt5, src_vt6, src_vt7, src_vt8); + src_y += (4 * stride); + + XORI_B4_128_SB(src_vt5, src_vt6, src_vt7, src_vt8); + ILVR_B4_SB(src_vt1, src_vt0, src_vt2, src_vt1, src_vt3, src_vt2, + src_vt4, src_vt3, src_vt10_r, src_vt21_r, src_vt32_r, + src_vt43_r); + ILVR_B4_SB(src_vt5, src_vt4, src_vt6, src_vt5, src_vt7, src_vt6, + src_vt8, src_vt7, src_vt54_r, src_vt65_r, src_vt76_r, + src_vt87_r); + vt_out0 = AVC_DOT_SH3_SH(src_vt10_r, src_vt32_r, src_vt54_r, filt0, + filt1, filt2); + vt_out1 = AVC_DOT_SH3_SH(src_vt21_r, src_vt43_r, src_vt65_r, filt0, + filt1, filt2); + vt_out2 = AVC_DOT_SH3_SH(src_vt32_r, src_vt54_r, src_vt76_r, filt0, + filt1, filt2); + vt_out3 = AVC_DOT_SH3_SH(src_vt43_r, src_vt65_r, src_vt87_r, filt0, + filt1, filt2); + SRARI_H4_SH(vt_out0, vt_out1, vt_out2, vt_out3, 5); + SAT_SH4_SH(vt_out0, vt_out1, vt_out2, vt_out3, 7); + + out0 = __msa_srari_h((hz_out0 + vt_out0), 1); + out1 = __msa_srari_h((hz_out1 + vt_out1), 1); + out2 = __msa_srari_h((hz_out2 + vt_out2), 1); + out3 = __msa_srari_h((hz_out3 + vt_out3), 1); + + SAT_SH4_SH(out0, out1, out2, out3, 7); + tmp0 = PCKEV_XORI128_UB(out0, out1); + tmp1 = PCKEV_XORI128_UB(out2, out3); + ST8x4_UB(tmp0, tmp1, dst, stride); + dst += (4 * stride); - for (multiple8_cnt = 2; multiple8_cnt--;) { - avc_luma_hv_qrt_8w_msa(src_x, src_y, src_stride, dst, dst_stride, - height); + src_vt0 = src_vt4; + src_vt1 = src_vt5; + src_vt2 = src_vt6; + src_vt3 = src_vt7; + src_vt4 = src_vt8; + } - src_x += 8; - src_y += 8; - dst += 8; + src_x_tmp += 8; + src_y_tmp += 8; + dst_tmp += 8; } } @@ -2531,90 +2623,78 @@ void ff_put_h264_qpel4_mc03_msa(uint8_t *dst, const uint8_t *src, void ff_put_h264_qpel16_mc11_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride) { - avc_luma_hv_qrt_16w_msa(src - 2, - src - (stride * 2), stride, dst, stride, 16); + avc_luma_hv_qrt_16x16_msa(src - 2, src - (stride * 2), dst, + stride); } void ff_put_h264_qpel16_mc31_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride) { - avc_luma_hv_qrt_16w_msa(src - 2, - src - (stride * 2) + - sizeof(uint8_t), stride, dst, stride, 16); + avc_luma_hv_qrt_16x16_msa(src - 2, src - (stride * 2) + 1, dst, + stride); } void ff_put_h264_qpel16_mc13_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride) { - avc_luma_hv_qrt_16w_msa(src + stride - 2, - src - (stride * 2), stride, dst, stride, 16); + avc_luma_hv_qrt_16x16_msa(src + stride - 2, src - (stride * 2), dst, + stride); } void ff_put_h264_qpel16_mc33_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride) { - avc_luma_hv_qrt_16w_msa(src + stride - 2, - src - (stride * 2) + - sizeof(uint8_t), stride, dst, stride, 16); + avc_luma_hv_qrt_16x16_msa(src + stride - 2, src - (stride * 2) + 1, dst, + stride); } void ff_put_h264_qpel8_mc11_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride) { - avc_luma_hv_qrt_8w_msa(src - 2, src - (stride * 2), stride, dst, stride, 8); + avc_luma_hv_qrt_8x8_msa(src - 2, src - (stride * 2), dst, stride); } void ff_put_h264_qpel8_mc31_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride) { - avc_luma_hv_qrt_8w_msa(src - 2, - src - (stride * 2) + - sizeof(uint8_t), stride, dst, stride, 8); + avc_luma_hv_qrt_8x8_msa(src - 2, src - (stride * 2) + 1, dst, + stride); } void ff_put_h264_qpel8_mc13_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride) { - avc_luma_hv_qrt_8w_msa(src + stride - 2, - src - (stride * 2), stride, dst, stride, 8); + avc_luma_hv_qrt_8x8_msa(src + stride - 2, src - (stride * 2), dst, + stride); } void ff_put_h264_qpel8_mc33_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride) { - avc_luma_hv_qrt_8w_msa(src + stride - 2, - src - (stride * 2) + - sizeof(uint8_t), stride, dst, stride, 8); + avc_luma_hv_qrt_8x8_msa(src + stride - 2, src - (stride * 2) + 1, dst, + stride); } void ff_put_h264_qpel4_mc11_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride) { - avc_luma_hv_qrt_4w_msa(src - 2, src - (stride * 2), stride, dst, stride, 4); + avc_luma_hv_qrt_4x4_msa(src - 2, src - (stride * 2), dst, stride); } void ff_put_h264_qpel4_mc31_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride) { - avc_luma_hv_qrt_4w_msa(src - 2, - src - (stride * 2) + - sizeof(uint8_t), stride, dst, stride, 4); + avc_luma_hv_qrt_4x4_msa(src - 2, src - (stride * 2) + 1, dst, + stride); } void ff_put_h264_qpel4_mc13_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride) { - avc_luma_hv_qrt_4w_msa(src + stride - 2, - src - (stride * 2), stride, dst, stride, 4); + avc_luma_hv_qrt_4x4_msa(src + stride - 2, src - (stride * 2), dst, + stride); } void ff_put_h264_qpel4_mc33_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride) { - avc_luma_hv_qrt_4w_msa(src + stride - 2, - src - (stride * 2) + - sizeof(uint8_t), stride, dst, stride, 4); + avc_luma_hv_qrt_4x4_msa(src + stride - 2, src - (stride * 2) + 1, dst, + stride); } void ff_put_h264_qpel16_mc21_msa(uint8_t *dst, const uint8_t *src, -- 1.7.9.5 _______________________________________________ ffmpeg-devel mailing list ffmpeg-devel@ffmpeg.org http://ffmpeg.org/mailman/listinfo/ffmpeg-devel diff --git a/libavcodec/mips/h264qpel_msa.c b/libavcodec/mips/h264qpel_msa.c index f11fce8..fcccb98 100644 --- a/libavcodec/mips/h264qpel_msa.c +++ b/libavcodec/mips/h264qpel_msa.c @@ -171,23 +171,27 @@ static const uint8_t luma_mask_arr[16 * 8] = { out0_m; \ } ) -static void avc_luma_hv_qrt_4w_msa(const uint8_t *src_x, const uint8_t *src_y, - int32_t src_stride, uint8_t *dst, - int32_t dst_stride, int32_t height) +static void avc_luma_hv_qrt_4x4_msa(const uint8_t *src_x, const uint8_t *src_y, + uint8_t *dst, int32_t stride) { - uint32_t loop_cnt; - v16i8 src_hz0, src_hz1, src_hz2, src_hz3; - v16i8 src_vt0, src_vt1, src_vt2, src_vt3, src_vt4; - v16i8 src_vt5, src_vt6, src_vt7, src_vt8; - v16i8 mask0, mask1, mask2; - v8i16 hz_out0, hz_out1, vert_out0, vert_out1; - v8i16 out0, out1; + const int16_t filt_const0 = 0xfb01; + const int16_t filt_const1 = 0x1414; + const int16_t filt_const2 = 0x1fb; v16u8 out; + v16i8 src_hz0, src_hz1, src_hz2, src_hz3, src_vt7, src_vt8; + v16i8 src_vt0, src_vt1, src_vt2, src_vt3, src_vt4, src_vt5, src_vt6; + v16i8 src_vt10_r, src_vt32_r, src_vt54_r, src_vt76_r; + v16i8 mask0, mask1, mask2, filt0, filt1, filt2; + v8i16 hz_out0, hz_out1, vt_out0, vt_out1, out0, out1; + + filt0 = (v16i8) __msa_fill_h(filt_const0); + filt1 = (v16i8) __msa_fill_h(filt_const1); + filt2 = (v16i8) __msa_fill_h(filt_const2); LD_SB3(&luma_mask_arr[48], 16, mask0, mask1, mask2); - LD_SB5(src_y, src_stride, src_vt0, src_vt1, src_vt2, src_vt3, src_vt4); - src_y += (5 * src_stride); + LD_SB5(src_y, stride, src_vt0, src_vt1, src_vt2, src_vt3, src_vt4); + src_y += (5 * stride); src_vt0 = (v16i8) __msa_insve_w((v4i32) src_vt0, 1, (v4i32) src_vt1); src_vt1 = (v16i8) __msa_insve_w((v4i32) src_vt1, 1, (v4i32) src_vt2); @@ -196,149 +200,237 @@ static void avc_luma_hv_qrt_4w_msa(const uint8_t *src_x, const uint8_t *src_y,