diff mbox series

[FFmpeg-devel] lavc/vp8dsp: R-V V bilin_load to bilin_load_h

Message ID tencent_E496074F95C6827C68BD186CCE0D6B352C05@qq.com
State New
Headers show
Series [FFmpeg-devel] lavc/vp8dsp: R-V V bilin_load to bilin_load_h | expand

Checks

Context Check Description
yinshiyou/configure_loongarch64 warning Failed to apply patch
andriy/configure_x86 warning Failed to apply patch

Commit Message

uk7b@foxmail.com June 12, 2024, 3:21 p.m. UTC
From: sunyuechi <sunyuechi@iscas.ac.cn>

---
 libavcodec/riscv/vp8dsp_rvv.S | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)
diff mbox series

Patch

diff --git a/libavcodec/riscv/vp8dsp_rvv.S b/libavcodec/riscv/vp8dsp_rvv.S
index a5f2e34f44..6ad349741e 100644
--- a/libavcodec/riscv/vp8dsp_rvv.S
+++ b/libavcodec/riscv/vp8dsp_rvv.S
@@ -150,12 +150,8 @@  func ff_vp8_idct_dc_add4uv_rvv, zve32x
         ret
 endfunc
 
-.macro bilin_load dst type mn
-.ifc \type,v
-        add             t5, a2, a3
-.else
+.macro bilin_load_h dst mn
         addi            t5, a2, 1
-.endif
         vle8.v          \dst, (a2)
         vle8.v          v2, (t5)
         vwmulu.vx       v28, \dst, t1
@@ -217,12 +213,12 @@  func ff_put_vp8_bilin4_hv_rvv, zve32x
         sub             t1, t3, a5
         sub             t2, t3, a6
         li              t4, 4
-        bilin_load      v4, h, a5
+        bilin_load_h    v4, a5
         add             a2, a2, a3
 1:
         addi            a4, a4, -1
         vwmulu.vx       v20, v4, t2
-        bilin_load      v4, h, a5
+        bilin_load_h    v4, a5
         vwmaccu.vx      v20, a6, v4
         vwaddu.wx       v24, v20, t4
         vnsra.wi        v0, v24, 3