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VLCHXWodZD1n+V+U0+C/kcKsFkIiS8gL691yihoQjVMT1NJFfvGk6LGG+RU0+FCJDIhmZnzKdZCt +OQcV2LQAYVOT+A230CL0Hx84MK5DLc57XhxPvIraVHlBatXIRd+5HBv4q606/N1IKKhgeG7GPQU 84Rrtcjxl41ch4mZOP21aUaEcCyr0gAQ3mLcc/U16W/PG7UAduQ/haMrEzGtIZdmPsiNSiucsPhq q9nGxssZN8TAsEZqFJPJLJ4XrtZV2NnVu5hong7U9kGOWKJu7QUt7ykbmDOPSCYcbCKaKjpGwbL8 cD/coe75+uP5EHbrMKathxHYv9aUc+BYAQ0hD/qsrEiBPo3zFf4zTlIlAcegevQOLbB7X5Bo1t3l +dnymYOkl2hLos9ogJ/XLlmUICsr970fxxPeucUGGRFyEWloI8cyBWiN3PzY3zyJ4Q3idN8Q+9O2 EgStW8w564kCepAtdUIh2tQfy+da6dg4AsZD10ws0y/AkGXJjGXuGQtlvMV6EqD4ErvmsMA/N6Fg cFxF5qrnWUI/m/MtfuBQS8JiRh/cWCaI91aMTzsk1t X-QQ-XMRINFO: M/715EihBoGSf6IYSX1iLFg= From: uk7b@foxmail.com To: ffmpeg-devel@ffmpeg.org Date: Fri, 9 Aug 2024 22:24:03 +0800 X-OQ-MSGID: <20240809142406.3845162-1-uk7b@foxmail.com> X-Mailer: git-send-email 2.46.0 MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCH 1/4] lavc/vp9dsp: R-V V mc bilin h v X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Cc: sunyuechi Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: BQ7yfd6etwaB From: sunyuechi C908 X60 vp9_avg_bilin_4h_8bpp_c : 5.5 4.7 vp9_avg_bilin_4h_8bpp_rvv_i32 : 1.7 1.5 vp9_avg_bilin_4v_8bpp_c : 5.5 4.7 vp9_avg_bilin_4v_8bpp_rvv_i32 : 1.5 1.2 vp9_avg_bilin_8h_8bpp_c : 20.0 17.7 vp9_avg_bilin_8h_8bpp_rvv_i32 : 3.0 2.7 vp9_avg_bilin_8v_8bpp_c : 20.7 18.7 vp9_avg_bilin_8v_8bpp_rvv_i32 : 3.0 2.7 vp9_avg_bilin_16h_8bpp_c : 78.2 69.7 vp9_avg_bilin_16h_8bpp_rvv_i32 : 7.0 6.2 vp9_avg_bilin_16v_8bpp_c : 98.5 73.2 vp9_avg_bilin_16v_8bpp_rvv_i32 : 7.0 6.0 vp9_avg_bilin_32h_8bpp_c : 325.5 275.5 vp9_avg_bilin_32h_8bpp_rvv_i32 : 23.0 20.5 vp9_avg_bilin_32v_8bpp_c : 342.2 290.0 vp9_avg_bilin_32v_8bpp_rvv_i32 : 21.7 19.5 vp9_avg_bilin_64h_8bpp_c : 1263.7 1095.7 vp9_avg_bilin_64h_8bpp_rvv_i32 : 91.2 81.2 vp9_avg_bilin_64v_8bpp_c : 1331.7 1155.2 vp9_avg_bilin_64v_8bpp_rvv_i32 : 91.2 81.0 vp9_put_bilin_4h_8bpp_c : 4.5 4.0 vp9_put_bilin_4h_8bpp_rvv_i32 : 1.0 1.0 vp9_put_bilin_4v_8bpp_c : 4.7 4.2 vp9_put_bilin_4v_8bpp_rvv_i32 : 1.0 1.0 vp9_put_bilin_8h_8bpp_c : 16.7 15.0 vp9_put_bilin_8h_8bpp_rvv_i32 : 2.2 2.0 vp9_put_bilin_8v_8bpp_c : 17.5 15.7 vp9_put_bilin_8v_8bpp_rvv_i32 : 2.2 2.0 vp9_put_bilin_16h_8bpp_c : 65.2 58.0 vp9_put_bilin_16h_8bpp_rvv_i32 : 6.0 5.5 vp9_put_bilin_16v_8bpp_c : 69.2 61.7 vp9_put_bilin_16v_8bpp_rvv_i32 : 5.7 5.2 vp9_put_bilin_32h_8bpp_c : 273.2 229.0 vp9_put_bilin_32h_8bpp_rvv_i32 : 19.7 17.7 vp9_put_bilin_32v_8bpp_c : 290.5 243.7 vp9_put_bilin_32v_8bpp_rvv_i32 : 18.7 16.7 vp9_put_bilin_64h_8bpp_c : 1040.5 910.5 vp9_put_bilin_64h_8bpp_rvv_i32 : 82.5 73.0 vp9_put_bilin_64v_8bpp_c : 1108.5 971.0 vp9_put_bilin_64v_8bpp_rvv_i32 : 82.2 73.2 --- libavcodec/riscv/vp9_mc_rvv.S | 105 +++++++++++++++++++++++++++++++++ libavcodec/riscv/vp9dsp.h | 12 ++-- libavcodec/riscv/vp9dsp_init.c | 21 +++++++ 3 files changed, 132 insertions(+), 6 deletions(-) diff --git a/libavcodec/riscv/vp9_mc_rvv.S b/libavcodec/riscv/vp9_mc_rvv.S index 8d776661d9..9e8061616f 100644 --- a/libavcodec/riscv/vp9_mc_rvv.S +++ b/libavcodec/riscv/vp9_mc_rvv.S @@ -54,6 +54,111 @@ func ff_vp9_avg\len\()_rvv, zve32x endfunc .endm +.macro bilin_load dst, mn, type +.ifc \type,v + add t4, a2, a3 +.else + addi t4, a2, 1 +.endif + vle8.v v4, (a2) + vle8.v v0, (t4) + vwmulu.vx v16, v0, \mn + vwmaccsu.vx v16, t1, v4 + vwadd.wx v16, v16, t3 + vnsra.wi v16, v16, 4 + vadd.vv \dst, v16, v4 + add a2, a2, a3 +.endm + +.macro bilin_h_v op, type, mn +func ff_\op\()_vp9_bilin_64\type\()_rvv, zve32x + lpad 0 + vsetvlstatic8 64, t0, 64 +.ifc \op,avg + csrwi vxrm, 0 +.endif + li t3, 8 + neg t1, \mn +1: + addi a4, a4, -1 + bilin_load v0, \mn, \type +.ifc \op,avg + vle8.v v16, (a0) + vaaddu.vv v0, v0, v16 +.endif + vse8.v v0, (a0) + add a0, a0, a1 + bnez a4, 1b + ret + +.Lbilin_\type\op: +.ifc \op,avg + csrwi vxrm, 0 +.endif + li t4, 8 + neg t1, \mn +1: + addi a4, a4, -2 + add t6, a0, a1 + add t0, a2, a3 + vle8.v v8, (a2) + vle8.v v4, (t0) +.ifc \type,v + add t2, t0, a3 + vwmulu.vx v16, v4, \mn +.else + addi t3, a2, 1 + addi t2, t0, 1 + vle8.v v0, (t3) + vwmulu.vx v16, v0, \mn +.endif + vle8.v v12, (t2) + vwmulu.vx v20, v12, \mn + vwmaccsu.vx v16, t1, v8 + vwmaccsu.vx v20, t1, v4 + vwadd.wx v16, v16, t4 + vwadd.wx v20, v20, t4 + vnsra.wi v16, v16, 4 + vnsra.wi v20, v20, 4 + vadd.vv v0, v16, v8 + vadd.vv v12, v20, v4 +.ifc \op,avg + vle8.v v16, (a0) + vle8.v v20, (t6) + vaaddu.vv v0, v0, v16 + vaaddu.vv v12, v12, v20 +.endif + vse8.v v0, (a0) + vse8.v v12, (t6) + add a2, t0, a3 + add a0, t6, a1 + bnez a4, 1b + + ret +endfunc +.endm + .irp len, 64, 32, 16, 8, 4 copy_avg \len .endr + +bilin_h_v put, h, a5 +bilin_h_v avg, h, a5 +bilin_h_v put, v, a6 +bilin_h_v avg, v, a6 + +.macro func_bilin_h_v len, op, type +func ff_\op\()_vp9_bilin_\len\()\type\()_rvv, zve32x + lpad 0 + vsetvlstatic8 \len, t0, 64 + j .Lbilin_\type\()\op +endfunc +.endm + +.irp len, 32, 16, 8, 4 + .irp op, put, avg + .irp type, h, v + func_bilin_h_v \len, \op, \type + .endr + .endr +.endr diff --git a/libavcodec/riscv/vp9dsp.h b/libavcodec/riscv/vp9dsp.h index ff8431591c..8fb326dae0 100644 --- a/libavcodec/riscv/vp9dsp.h +++ b/libavcodec/riscv/vp9dsp.h @@ -113,27 +113,27 @@ void ff_avg_8tap_##type##_##SIZE##hv_rvv(uint8_t *dst, ptrdiff_t dststride, \ int h, int mx, int my); #define VP9_BILINEAR_RISCV_RVV_FUNC(SIZE) \ -void ff_put_bilin_##SIZE##h_rvv(uint8_t *dst, ptrdiff_t dststride, \ +void ff_put_vp9_bilin_##SIZE##h_rvv(uint8_t *dst, ptrdiff_t dststride, \ const uint8_t *src, ptrdiff_t srcstride, \ int h, int mx, int my); \ \ -void ff_put_bilin_##SIZE##v_rvv(uint8_t *dst, ptrdiff_t dststride, \ +void ff_put_vp9_bilin_##SIZE##v_rvv(uint8_t *dst, ptrdiff_t dststride, \ const uint8_t *src, ptrdiff_t srcstride, \ int h, int mx, int my); \ \ -void ff_put_bilin_##SIZE##hv_rvv(uint8_t *dst, ptrdiff_t dststride, \ +void ff_put_vp9_bilin_##SIZE##hv_rvv(uint8_t *dst, ptrdiff_t dststride, \ const uint8_t *src, ptrdiff_t srcstride, \ int h, int mx, int my); \ \ -void ff_avg_bilin_##SIZE##h_rvv(uint8_t *dst, ptrdiff_t dststride, \ +void ff_avg_vp9_bilin_##SIZE##h_rvv(uint8_t *dst, ptrdiff_t dststride, \ const uint8_t *src, ptrdiff_t srcstride, \ int h, int mx, int my); \ \ -void ff_avg_bilin_##SIZE##v_rvv(uint8_t *dst, ptrdiff_t dststride, \ +void ff_avg_vp9_bilin_##SIZE##v_rvv(uint8_t *dst, ptrdiff_t dststride, \ const uint8_t *src, ptrdiff_t srcstride, \ int h, int mx, int my); \ \ -void ff_avg_bilin_##SIZE##hv_rvv(uint8_t *dst, ptrdiff_t dststride, \ +void ff_avg_vp9_bilin_##SIZE##hv_rvv(uint8_t *dst, ptrdiff_t dststride, \ const uint8_t *src, ptrdiff_t srcstride, \ int h, int mx, int my); diff --git a/libavcodec/riscv/vp9dsp_init.c b/libavcodec/riscv/vp9dsp_init.c index 2034e1c976..83dbe1b5d9 100644 --- a/libavcodec/riscv/vp9dsp_init.c +++ b/libavcodec/riscv/vp9dsp_init.c @@ -63,6 +63,27 @@ static av_cold void vp9dsp_mc_init_riscv(VP9DSPContext *dsp, int bpp) init_fpel(3, 8); init_fpel(4, 4); + dsp->mc[0][FILTER_BILINEAR ][0][0][1] = ff_put_vp9_bilin_64v_rvv; + dsp->mc[0][FILTER_BILINEAR ][0][1][0] = ff_put_vp9_bilin_64h_rvv; + dsp->mc[0][FILTER_BILINEAR ][1][0][1] = ff_avg_vp9_bilin_64v_rvv; + dsp->mc[0][FILTER_BILINEAR ][1][1][0] = ff_avg_vp9_bilin_64h_rvv; + dsp->mc[1][FILTER_BILINEAR ][0][0][1] = ff_put_vp9_bilin_32v_rvv; + dsp->mc[1][FILTER_BILINEAR ][0][1][0] = ff_put_vp9_bilin_32h_rvv; + dsp->mc[1][FILTER_BILINEAR ][1][0][1] = ff_avg_vp9_bilin_32v_rvv; + dsp->mc[1][FILTER_BILINEAR ][1][1][0] = ff_avg_vp9_bilin_32h_rvv; + dsp->mc[2][FILTER_BILINEAR ][0][0][1] = ff_put_vp9_bilin_16v_rvv; + dsp->mc[2][FILTER_BILINEAR ][0][1][0] = ff_put_vp9_bilin_16h_rvv; + dsp->mc[2][FILTER_BILINEAR ][1][0][1] = ff_avg_vp9_bilin_16v_rvv; + dsp->mc[2][FILTER_BILINEAR ][1][1][0] = ff_avg_vp9_bilin_16h_rvv; + dsp->mc[3][FILTER_BILINEAR ][0][0][1] = ff_put_vp9_bilin_8v_rvv; + dsp->mc[3][FILTER_BILINEAR ][0][1][0] = ff_put_vp9_bilin_8h_rvv; + dsp->mc[3][FILTER_BILINEAR ][1][0][1] = ff_avg_vp9_bilin_8v_rvv; + dsp->mc[3][FILTER_BILINEAR ][1][1][0] = ff_avg_vp9_bilin_8h_rvv; + dsp->mc[4][FILTER_BILINEAR ][0][0][1] = ff_put_vp9_bilin_4v_rvv; + dsp->mc[4][FILTER_BILINEAR ][0][1][0] = ff_put_vp9_bilin_4h_rvv; + dsp->mc[4][FILTER_BILINEAR ][1][0][1] = ff_avg_vp9_bilin_4v_rvv; + dsp->mc[4][FILTER_BILINEAR ][1][1][0] = ff_avg_vp9_bilin_4h_rvv; + #undef init_fpel } #endif From patchwork Fri Aug 9 14:24:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: uk7b@foxmail.com X-Patchwork-Id: 50956 Delivered-To: ffmpegpatchwork2@gmail.com Received: by 2002:a59:b106:0:b0:489:2eb3:e4c4 with SMTP id o6csp469936vqn; Fri, 9 Aug 2024 07:24:31 -0700 (PDT) X-Forwarded-Encrypted: i=2; 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1.0 Subject: [FFmpeg-devel] [PATCH 2/4] lavc/vp9dsp: R-V V mc bilin hv X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Cc: sunyuechi Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: FMOVQUxiDbtB From: sunyuechi C908 X60 vp9_avg_bilin_4hv_8bpp_c : 10.7 9.5 vp9_avg_bilin_4hv_8bpp_rvv_i32 : 4.0 3.5 vp9_avg_bilin_8hv_8bpp_c : 38.5 34.2 vp9_avg_bilin_8hv_8bpp_rvv_i32 : 7.2 6.5 vp9_avg_bilin_16hv_8bpp_c : 147.2 130.5 vp9_avg_bilin_16hv_8bpp_rvv_i32 : 14.5 12.7 vp9_avg_bilin_32hv_8bpp_c : 574.2 509.7 vp9_avg_bilin_32hv_8bpp_rvv_i32 : 42.5 38.0 vp9_avg_bilin_64hv_8bpp_c : 2321.2 2017.7 vp9_avg_bilin_64hv_8bpp_rvv_i32 : 163.5 131.0 vp9_put_bilin_4hv_8bpp_c : 10.0 8.7 vp9_put_bilin_4hv_8bpp_rvv_i32 : 3.5 3.0 vp9_put_bilin_8hv_8bpp_c : 35.2 31.2 vp9_put_bilin_8hv_8bpp_rvv_i32 : 6.5 5.7 vp9_put_bilin_16hv_8bpp_c : 134.0 119.0 vp9_put_bilin_16hv_8bpp_rvv_i32 : 12.7 11.5 vp9_put_bilin_32hv_8bpp_c : 538.5 464.2 vp9_put_bilin_32hv_8bpp_rvv_i32 : 39.7 35.2 vp9_put_bilin_64hv_8bpp_c : 2111.7 1833.2 vp9_put_bilin_64hv_8bpp_rvv_i32 : 138.5 122.5 --- libavcodec/riscv/vp9_mc_rvv.S | 46 +++++++++++++++++++++++++++++++++- libavcodec/riscv/vp9dsp_init.c | 10 ++++++++ 2 files changed, 55 insertions(+), 1 deletion(-) diff --git a/libavcodec/riscv/vp9_mc_rvv.S b/libavcodec/riscv/vp9_mc_rvv.S index 9e8061616f..d1ddbe007b 100644 --- a/libavcodec/riscv/vp9_mc_rvv.S +++ b/libavcodec/riscv/vp9_mc_rvv.S @@ -138,6 +138,48 @@ func ff_\op\()_vp9_bilin_64\type\()_rvv, zve32x endfunc .endm +.macro bilin_hv op +func ff_\op\()_vp9_bilin_64hv_rvv, zve32x + lpad 0 + vsetvlstatic8 64, t0, 64 +.Lbilin_hv\op: +.ifc \op,avg + csrwi vxrm, 0 +.endif + neg t1, a5 + neg t2, a6 + li t3, 8 + bilin_load v24, a5, h +1: + addi a4, a4, -2 + bilin_load v8, a5, h + vwmulu.vx v16, v8, a6 + vwmaccsu.vx v16, t2, v24 + vwadd.wx v16, v16, t3 + vnsra.wi v16, v16, 4 + vadd.vv v12, v16, v24 + add t5, a0, a1 + bilin_load v24, a5, h + vwmulu.vx v16, v24, a6 + vwmaccsu.vx v16, t2, v8 + vwadd.wx v16, v16, t3 + vnsra.wi v16, v16, 4 + vadd.vv v0, v16, v8 +.ifc \op,avg + vle8.v v8, (a0) + vle8.v v16, (t5) + vaaddu.vv v12, v12, v8 + vaaddu.vv v0, v0, v16 +.endif + vse8.v v12, (a0) + vse8.v v0, (t5) + add a0, t5, a1 + bnez a4, 1b + + ret +endfunc +.endm + .irp len, 64, 32, 16, 8, 4 copy_avg \len .endr @@ -146,6 +188,8 @@ bilin_h_v put, h, a5 bilin_h_v avg, h, a5 bilin_h_v put, v, a6 bilin_h_v avg, v, a6 +bilin_hv put +bilin_hv avg .macro func_bilin_h_v len, op, type func ff_\op\()_vp9_bilin_\len\()\type\()_rvv, zve32x @@ -157,7 +201,7 @@ endfunc .irp len, 32, 16, 8, 4 .irp op, put, avg - .irp type, h, v + .irp type, h, v, hv func_bilin_h_v \len, \op, \type .endr .endr diff --git a/libavcodec/riscv/vp9dsp_init.c b/libavcodec/riscv/vp9dsp_init.c index 83dbe1b5d9..d53852f673 100644 --- a/libavcodec/riscv/vp9dsp_init.c +++ b/libavcodec/riscv/vp9dsp_init.c @@ -83,6 +83,16 @@ static av_cold void vp9dsp_mc_init_riscv(VP9DSPContext *dsp, int bpp) dsp->mc[4][FILTER_BILINEAR ][0][1][0] = ff_put_vp9_bilin_4h_rvv; dsp->mc[4][FILTER_BILINEAR ][1][0][1] = ff_avg_vp9_bilin_4v_rvv; dsp->mc[4][FILTER_BILINEAR ][1][1][0] = ff_avg_vp9_bilin_4h_rvv; + dsp->mc[0][FILTER_BILINEAR ][0][1][1] = ff_put_vp9_bilin_64hv_rvv; + dsp->mc[0][FILTER_BILINEAR ][1][1][1] = ff_avg_vp9_bilin_64hv_rvv; + dsp->mc[1][FILTER_BILINEAR ][0][1][1] = ff_put_vp9_bilin_32hv_rvv; + dsp->mc[1][FILTER_BILINEAR ][1][1][1] = ff_avg_vp9_bilin_32hv_rvv; + dsp->mc[2][FILTER_BILINEAR ][0][1][1] = ff_put_vp9_bilin_16hv_rvv; + dsp->mc[2][FILTER_BILINEAR ][1][1][1] = ff_avg_vp9_bilin_16hv_rvv; + dsp->mc[3][FILTER_BILINEAR ][0][1][1] = ff_put_vp9_bilin_8hv_rvv; + dsp->mc[3][FILTER_BILINEAR ][1][1][1] = ff_avg_vp9_bilin_8hv_rvv; + dsp->mc[4][FILTER_BILINEAR ][0][1][1] = ff_put_vp9_bilin_4hv_rvv; + dsp->mc[4][FILTER_BILINEAR ][1][1][1] = ff_avg_vp9_bilin_4hv_rvv; #undef init_fpel } From patchwork Fri Aug 9 14:24:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: uk7b@foxmail.com X-Patchwork-Id: 50957 Delivered-To: ffmpegpatchwork2@gmail.com Received: by 2002:a59:b106:0:b0:489:2eb3:e4c4 with SMTP id o6csp470119vqn; Fri, 9 Aug 2024 07:24:53 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCV/kAzrIZmTAPIAn3OANAP2v+3vD57gkrySxgo2m8+8PpfHSLckZqwvnWXn3UohqgJh6vXdTOUH0zWTg90m8gHuPFX5sKE4trgGSg== X-Google-Smtp-Source: AGHT+IEtzWAG8B5CeYxTWYeZD79F0wMDCFU3NiuXiEagOG2fEJDukbmrYlqOnhDeJtpJzogQOjnB X-Received: by 2002:a05:6512:400c:b0:52c:dba6:b4c8 with SMTP id 2adb3069b0e04-530ee9792f0mr1572591e87.13.1723213493036; Fri, 09 Aug 2024 07:24:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1723213493; cv=none; d=google.com; s=arc-20160816; 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<20240809142406.3845162-1-uk7b@foxmail.com> MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCH 4/4] lavc/vp9dsp: R-V V mc tap hv X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Cc: sunyuechi Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: zD7NG04dSD71 From: sunyuechi C908 X60 vp9_avg_8tap_smooth_4hv_8bpp_c : 32.0 28.0 vp9_avg_8tap_smooth_4hv_8bpp_rvv_i32 : 15.0 13.2 vp9_avg_8tap_smooth_8hv_8bpp_c : 98.0 86.2 vp9_avg_8tap_smooth_8hv_8bpp_rvv_i32 : 23.7 21.2 vp9_avg_8tap_smooth_16hv_8bpp_c : 355.7 297.0 vp9_avg_8tap_smooth_16hv_8bpp_rvv_i32 : 47.0 41.5 vp9_avg_8tap_smooth_32hv_8bpp_c : 1272.7 1099.7 vp9_avg_8tap_smooth_32hv_8bpp_rvv_i32 : 134.7 119.7 vp9_avg_8tap_smooth_64hv_8bpp_c : 4937.0 4224.2 vp9_avg_8tap_smooth_64hv_8bpp_rvv_i32 : 528.5 228.5 vp9_put_8tap_smooth_4hv_8bpp_c : 30.2 26.7 vp9_put_8tap_smooth_4hv_8bpp_rvv_i32 : 30.5 12.5 vp9_put_8tap_smooth_8hv_8bpp_c : 91.5 81.2 vp9_put_8tap_smooth_8hv_8bpp_rvv_i32 : 22.7 20.2 vp9_put_8tap_smooth_16hv_8bpp_c : 313.2 277.5 vp9_put_8tap_smooth_16hv_8bpp_rvv_i32 : 45.2 40.2 vp9_put_8tap_smooth_32hv_8bpp_c : 1166.7 1022.2 vp9_put_8tap_smooth_32hv_8bpp_rvv_i32 : 131.7 117.2 vp9_put_8tap_smooth_64hv_8bpp_c : 4560.5 3961.7 vp9_put_8tap_smooth_64hv_8bpp_rvv_i32 : 517.0 223.2 --- libavcodec/riscv/vp9_mc_rvv.S | 104 ++++++++++++++++++++++++++++----- libavcodec/riscv/vp9dsp_init.c | 8 +++ 2 files changed, 97 insertions(+), 15 deletions(-) diff --git a/libavcodec/riscv/vp9_mc_rvv.S b/libavcodec/riscv/vp9_mc_rvv.S index dfa41c58a4..e77172f6df 100644 --- a/libavcodec/riscv/vp9_mc_rvv.S +++ b/libavcodec/riscv/vp9_mc_rvv.S @@ -214,7 +214,7 @@ endfunc lh \regtype\()0, 0(\regtype\()0) .endm -.macro epel_load dst, len, op, name, type, from_mem, regtype +.macro epel_load dst, len, op, name, type, from_mem, regtype, t1=v0, t2=v2, t3=v4, t4=v6, t5=v8, t6=v10, t7=v12, t8=v14 .ifc \from_mem, 1 vle8.v v22, (a2) .ifc \type,v @@ -284,25 +284,25 @@ endfunc vwmulu.vx v20, v22, \regtype\()3 .else .ifc \name,smooth - vwmulu.vx v16, v8, \regtype\()4 - vwmaccu.vx v16, \regtype\()2, v4 - vwmaccu.vx v16, \regtype\()5, v10 - vwmaccsu.vx v16, \regtype\()6, v12 - vwmaccsu.vx v16, \regtype\()1, v2 + vwmulu.vx v16, \t5, \regtype\()4 + vwmaccu.vx v16, \regtype\()2, \t3 + vwmaccu.vx v16, \regtype\()5, \t6 + vwmaccsu.vx v16, \regtype\()6, \t7 + vwmaccsu.vx v16, \regtype\()1, \t2 .else - vwmulu.vx v16, v2, \regtype\()1 - vwmaccu.vx v16, \regtype\()6, v12 - vwmaccsu.vx v16, \regtype\()5, v10 - vwmaccsu.vx v16, \regtype\()2, v4 - vwmulu.vx v28, v8, \regtype\()4 + vwmulu.vx v16, \t2, \regtype\()1 + vwmaccu.vx v16, \regtype\()6, \t7 + vwmaccsu.vx v16, \regtype\()5, \t6 + vwmaccsu.vx v16, \regtype\()2, \t3 + vwmulu.vx v28, \t5, \regtype\()4 .endif - vwmaccsu.vx v16, \regtype\()0, v0 - vwmulu.vx v20, v6, \regtype\()3 + vwmaccsu.vx v16, \regtype\()0, \t1 + vwmulu.vx v20, \t4, \regtype\()3 .ifc \regtype,t - vwmaccsu.vx v16, a7, v14 + vwmaccsu.vx v16, a7, \t8 .else - vwmaccsu.vx v16, s7, v14 + vwmaccsu.vx v16, s7, \t8 .endif .endif @@ -355,6 +355,76 @@ func ff_\op\()_vp9_8tap_\name\()_\len\()\type\()_rvv\vlen\(), zve32x endfunc .endm +#if __riscv_xlen == 64 +.macro epel_hv_body len,op,name,t1,t2,t3,t4,t5,t6,t7,t8 + epel_load v30, \len, \op, \name, t, 0, s, \t1,\t2,\t3,\t4,\t5,\t6,\t7,\t8 + vse8.v v30, (a0) + epel_load \t1, \len, put, \name, h, 1, t + add a2, a2, a3 + add a0, a0, a1 +.endm + +.macro epel_hv_once len, name, op + sub a2, a2, a3 + sub a2, a2, a3 + sub a2, a2, a3 + .irp n,0,2,4,6,8,10,12,14 + epel_load_inc v\n, \len, put, \name, h, 1, t + .endr + addi a4, a4, -1 +1: + addi a4, a4, -8 + epel_hv_body \len,\op,\name,v0,v2,v4,v6,v8,v10,v12,v14 + epel_hv_body \len,\op,\name,v2,v4,v6,v8,v10,v12,v14,v0 + epel_hv_body \len,\op,\name,v4,v6,v8,v10,v12,v14,v0,v2 + epel_hv_body \len,\op,\name,v6,v8,v10,v12,v14,v0,v2,v4 +.if \len > 4 + epel_hv_body \len,\op,\name,v8,v10,v12,v14,v0,v2,v4,v6 + epel_hv_body \len,\op,\name,v10,v12,v14,v0,v2,v4,v6,v8 + epel_hv_body \len,\op,\name,v12,v14,v0,v2,v4,v6,v8,v10 + epel_hv_body \len,\op,\name,v14,v0,v2,v4,v6,v8,v10,v12 +.endif + bgtz a4, 1b +.endm + +.macro epel_hv op, name, len, vlen +func ff_\op\()_vp9_8tap_\name\()_\len\()hv_rvv\vlen\(), zve32x + lpad 0 + addi sp, sp, -64 + .irp n,0,1,2,3,4,5,6,7 + sd s\n, \n\()<<3(sp) + .endr +.if \len == 64 && \vlen < 256 + addi sp, sp, -48 + .irp n,0,1,2,3,4,5 + sd a\n, \n\()<<3(sp) + .endr +.endif + csrwi vxrm, 0 + epel_filter \name, h, t, a7 + epel_filter \name, v, s, s7 + vsetvlstatic8 \len, a6, 64, m2 + epel_hv_once \len, \name, \op +.if \len == 64 && \vlen < 256 + .irp n,0,1,2,3,4,5 + ld a\n, \n\()<<3(sp) + .endr + addi sp, sp, 48 + addi a0, a0, 32 + addi a2, a2, 32 + epel_filter \name, h, t, a7 + epel_hv_once \len, \name, \op +.endif + .irp n,0,1,2,3,4,5,6,7 + ld s\n, \n\()<<3(sp) + .endr + addi sp, sp, 64 + + ret +endfunc +.endm +#endif + .irp len, 64, 32, 16, 8, 4 copy_avg \len .irp op, put, avg @@ -363,6 +433,10 @@ endfunc epel \len, \op, \name, \type, 128 epel \len, \op, \name, \type, 256 .endr + #if __riscv_xlen == 64 + epel_hv \op, \name, \len, 128 + epel_hv \op, \name, \len, 256 + #endif .endr .endr .endr diff --git a/libavcodec/riscv/vp9dsp_init.c b/libavcodec/riscv/vp9dsp_init.c index 141e3483f8..bef1559231 100644 --- a/libavcodec/riscv/vp9dsp_init.c +++ b/libavcodec/riscv/vp9dsp_init.c @@ -119,6 +119,10 @@ static av_cold void vp9dsp_mc_init_riscv(VP9DSPContext *dsp, int bpp) if (flags & AV_CPU_FLAG_RVB) { init_subpel2(0, 0, 1, v, put, 128); init_subpel2(1, 0, 1, v, avg, 128); +# if __riscv_xlen == 64 + init_subpel2(0, 1, 1, hv, put, 128); + init_subpel2(1, 1, 1, hv, avg, 128); +# endif } } @@ -129,6 +133,10 @@ static av_cold void vp9dsp_mc_init_riscv(VP9DSPContext *dsp, int bpp) if (flags & AV_CPU_FLAG_RVB) { init_subpel2(0, 0, 1, v, put, 256); init_subpel2(1, 0, 1, v, avg, 256); +# if __riscv_xlen == 64 + init_subpel2(0, 1, 1, hv, put, 256); + init_subpel2(1, 1, 1, hv, avg, 256); +# endif } } }