From patchwork Tue Oct 20 03:45:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shiyou Yin X-Patchwork-Id: 23101 Return-Path: X-Original-To: patchwork@ffaux-bg.ffmpeg.org Delivered-To: patchwork@ffaux-bg.ffmpeg.org Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org [79.124.17.100]) by ffaux.localdomain (Postfix) with ESMTP id D1A2B448C9D for ; Tue, 20 Oct 2020 06:45:59 +0300 (EEST) Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id B8F7568AE80; Tue, 20 Oct 2020 06:45:59 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 3794B68AE80 for ; Tue, 20 Oct 2020 06:45:50 +0300 (EEST) Received: from localhost (unknown [36.33.26.144]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9DxaMRrXY5fqS4fAA--.6653S3; Tue, 20 Oct 2020 11:45:47 +0800 (CST) From: Shiyou Yin To: ffmpeg-devel@ffmpeg.org Date: Tue, 20 Oct 2020 11:45:41 +0800 Message-Id: <1603165544-8541-2-git-send-email-yinshiyou-hf@loongson.cn> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1603165544-8541-1-git-send-email-yinshiyou-hf@loongson.cn> References: <1603165544-8541-1-git-send-email-yinshiyou-hf@loongson.cn> X-CM-TRANSID: AQAAf9DxaMRrXY5fqS4fAA--.6653S3 X-Coremail-Antispam: 1UD129KBjvJXoW7AF1xGry3ur1xtFW8CF1kAFb_yoW8AFy3pF 1UAF17Gr4xGrZakr48Gr4Y9Fyayw1FqryYyF9rKan7A3y5Xr4xKr9xJ34kCrWUJFZFkF95 Xryqgry5G3WkCFUanT9S1TB71UUUUUDqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUk2b7Iv0xC_tr1lb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rw A2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xII jxv20xvEc7CjxVAFwI0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwV C2z280aVCY1x0267AKxVWxJr0_GcWle2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xv F2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jrv_JF1lYx0Ex4A2jsIE14v26r4j6F 4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCY02Avz4vE14v_Gr4l42xK 82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGw C20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1j6r15MIIYrxkI7VAKI48J MIIF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMI IF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E 87Iv6xkF7I0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxUIHGQDUUUU X-CM-SenderInfo: p1lq2x5l1r3gtki6z05rqj20fqof0/ Subject: [FFmpeg-devel] [PATCH v3 1/4] avcodec/mips: Restore the initialization sequence of MSA and MMI in ff_h264chroma_init_mips. X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches MIME-Version: 1.0 Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" The MSA version has been refined in commit 93218c2 and ce0a52e, and is better than MMI version now. Speed of decoding H264: 5.14x ==> 5.23x (tested on 3A4000). --- libavcodec/mips/h264chroma_init_mips.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/libavcodec/mips/h264chroma_init_mips.c b/libavcodec/mips/h264chroma_init_mips.c index 6bb19d3..755cc04 100644 --- a/libavcodec/mips/h264chroma_init_mips.c +++ b/libavcodec/mips/h264chroma_init_mips.c @@ -28,7 +28,15 @@ av_cold void ff_h264chroma_init_mips(H264ChromaContext *c, int bit_depth) int cpu_flags = av_get_cpu_flags(); int high_bit_depth = bit_depth > 8; - /* MMI apears to be faster than MSA here */ + if (have_mmi(cpu_flags)) { + if (!high_bit_depth) { + c->put_h264_chroma_pixels_tab[0] = ff_put_h264_chroma_mc8_mmi; + c->avg_h264_chroma_pixels_tab[0] = ff_avg_h264_chroma_mc8_mmi; + c->put_h264_chroma_pixels_tab[1] = ff_put_h264_chroma_mc4_mmi; + c->avg_h264_chroma_pixels_tab[1] = ff_avg_h264_chroma_mc4_mmi; + } + } + if (have_msa(cpu_flags)) { if (!high_bit_depth) { c->put_h264_chroma_pixels_tab[0] = ff_put_h264_chroma_mc8_msa; @@ -40,13 +48,4 @@ av_cold void ff_h264chroma_init_mips(H264ChromaContext *c, int bit_depth) c->avg_h264_chroma_pixels_tab[2] = ff_avg_h264_chroma_mc2_msa; } } - - if (have_mmi(cpu_flags)) { - if (!high_bit_depth) { - c->put_h264_chroma_pixels_tab[0] = ff_put_h264_chroma_mc8_mmi; - c->avg_h264_chroma_pixels_tab[0] = ff_avg_h264_chroma_mc8_mmi; - c->put_h264_chroma_pixels_tab[1] = ff_put_h264_chroma_mc4_mmi; - c->avg_h264_chroma_pixels_tab[1] = ff_avg_h264_chroma_mc4_mmi; - } - } } From patchwork Tue Oct 20 03:45:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shiyou Yin X-Patchwork-Id: 23102 Return-Path: X-Original-To: patchwork@ffaux-bg.ffmpeg.org Delivered-To: patchwork@ffaux-bg.ffmpeg.org Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org [79.124.17.100]) by ffaux.localdomain (Postfix) with ESMTP id 93054448C9D for ; Tue, 20 Oct 2020 06:46:01 +0300 (EEST) Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 78F6568B758; Tue, 20 Oct 2020 06:46:01 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 644F068AFD5 for ; Tue, 20 Oct 2020 06:45:50 +0300 (EEST) Received: from localhost (unknown [36.33.26.144]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9Dx39xrXY5fqi4fAA--.10859S3; Tue, 20 Oct 2020 11:45:48 +0800 (CST) From: Shiyou Yin To: ffmpeg-devel@ffmpeg.org Date: Tue, 20 Oct 2020 11:45:42 +0800 Message-Id: <1603165544-8541-3-git-send-email-yinshiyou-hf@loongson.cn> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1603165544-8541-1-git-send-email-yinshiyou-hf@loongson.cn> References: <1603165544-8541-1-git-send-email-yinshiyou-hf@loongson.cn> X-CM-TRANSID: AQAAf9Dx39xrXY5fqi4fAA--.10859S3 X-Coremail-Antispam: 1UD129KBjvJXoWxtr15Gw4xZw13XFWrKr17ZFb_yoWxKF1fpr y8Grs0yrWavFW7CFZxJF4xGrnxZF48tw18WFyUtF18Ars0vr1rurZ7GryxWw1rGFykuFWa vF1UZFy3CF17Zw7anT9S1TB71UUUUUDqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUkIb7Iv0xC_KF4lb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rw A2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xII jxv20xvEc7CjxVAFwI0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4 vEx4A2jsIEc7CjxVAFwI0_Cr1j6rxdM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVAC Y4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1Y6r17McIj6I8E87Iv67AKxVW8JV WxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41lc2xSY4AK67AK6r48MxAI w28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr 4lx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUJVWUXwCIc40Y0x0EwIxG rwCI42IY6xIIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVWUJVW8Jw CI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Gr0_Cr1lIxAIcVC2 z280aVCY1x0267AKxVW8JVW8JrUvcSsGvfC2KfnxnUUI43ZEXa7IU0SeHPUUUUU== X-CM-SenderInfo: p1lq2x5l1r3gtki6z05rqj20fqof0/ Subject: [FFmpeg-devel] [PATCH v3 2/4] avcodec/mips: Refine get_cabac_inline_mips. X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches MIME-Version: 1.0 Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" 1. Refined function get_cabac_inline_mips. 2. Optimize function get_cabac_bypass and get_cabac_bypass_sign. Speed of decoding h264: 5.23x ==> 5.45x(tested on 3A4000). --- libavcodec/mips/cabac.h | 131 +++++++++++++++++++++++++++++++++++++----------- 1 file changed, 102 insertions(+), 29 deletions(-) diff --git a/libavcodec/mips/cabac.h b/libavcodec/mips/cabac.h index 3d09e93..0ee7594 100644 --- a/libavcodec/mips/cabac.h +++ b/libavcodec/mips/cabac.h @@ -2,7 +2,8 @@ * Loongson SIMD optimized h264chroma * * Copyright (c) 2018 Loongson Technology Corporation Limited - * Copyright (c) 2018 Shiyou Yin + * Contributed by Shiyou Yin + * Gu Xiwei(guxiwei-hf@loongson.cn) * * This file is part of FFmpeg. * @@ -25,18 +26,18 @@ #define AVCODEC_MIPS_CABAC_H #include "libavcodec/cabac.h" -#include "libavutil/mips/asmdefs.h" +#include "libavutil/mips/mmiutils.h" #include "config.h" #define get_cabac_inline get_cabac_inline_mips static av_always_inline int get_cabac_inline_mips(CABACContext *c, - uint8_t * const state){ + uint8_t * const state){ mips_reg tmp0, tmp1, tmp2, bit; __asm__ volatile ( "lbu %[bit], 0(%[state]) \n\t" "and %[tmp0], %[c_range], 0xC0 \n\t" - PTR_ADDU "%[tmp0], %[tmp0], %[tmp0] \n\t" + PTR_SLL "%[tmp0], %[tmp0], 0x01 \n\t" PTR_ADDU "%[tmp0], %[tmp0], %[tables] \n\t" PTR_ADDU "%[tmp0], %[tmp0], %[bit] \n\t" /* tmp1: RangeLPS */ @@ -44,18 +45,11 @@ static av_always_inline int get_cabac_inline_mips(CABACContext *c, PTR_SUBU "%[c_range], %[c_range], %[tmp1] \n\t" PTR_SLL "%[tmp0], %[c_range], 0x11 \n\t" - PTR_SUBU "%[tmp0], %[tmp0], %[c_low] \n\t" - - /* tmp2: lps_mask */ - PTR_SRA "%[tmp2], %[tmp0], 0x1F \n\t" - /* If tmp0 < 0, lps_mask == 0xffffffff*/ - /* If tmp0 >= 0, lps_mask == 0x00000000*/ + "slt %[tmp2], %[tmp0], %[c_low] \n\t" "beqz %[tmp2], 1f \n\t" - PTR_SLL "%[tmp0], %[c_range], 0x11 \n\t" + "move %[c_range], %[tmp1] \n\t" + "not %[bit], %[bit] \n\t" PTR_SUBU "%[c_low], %[c_low], %[tmp0] \n\t" - PTR_SUBU "%[tmp0], %[tmp1], %[c_range] \n\t" - PTR_ADDU "%[c_range], %[c_range], %[tmp0] \n\t" - "xor %[bit], %[bit], %[tmp2] \n\t" "1: \n\t" /* tmp1: *state */ @@ -70,23 +64,18 @@ static av_always_inline int get_cabac_inline_mips(CABACContext *c, PTR_SLL "%[c_range], %[c_range], %[tmp2] \n\t" PTR_SLL "%[c_low], %[c_low], %[tmp2] \n\t" - "and %[tmp0], %[c_low], %[cabac_mask] \n\t" - "bnez %[tmp0], 1f \n\t" - PTR_ADDIU "%[tmp0], %[c_low], -0x01 \n\t" + "and %[tmp1], %[c_low], %[cabac_mask] \n\t" + "bnez %[tmp1], 1f \n\t" + PTR_ADDIU "%[tmp0], %[c_low], -0X01 \n\t" "xor %[tmp0], %[c_low], %[tmp0] \n\t" PTR_SRA "%[tmp0], %[tmp0], 0x0f \n\t" PTR_ADDU "%[tmp0], %[tmp0], %[tables] \n\t" + /* tmp2: ff_h264_norm_shift[x >> (CABAC_BITS - 1)] */ "lbu %[tmp2], %[norm_off](%[tmp0]) \n\t" -#if CABAC_BITS == 16 - "lbu %[tmp0], 0(%[c_bytestream]) \n\t" - "lbu %[tmp1], 1(%[c_bytestream]) \n\t" - PTR_SLL "%[tmp0], %[tmp0], 0x09 \n\t" - PTR_SLL "%[tmp1], %[tmp1], 0x01 \n\t" - PTR_ADDU "%[tmp0], %[tmp0], %[tmp1] \n\t" -#else - "lbu %[tmp0], 0(%[c_bytestream]) \n\t" + + "lhu %[tmp0], 0(%[c_bytestream]) \n\t" + "wsbh %[tmp0], %[tmp0] \n\t" PTR_SLL "%[tmp0], %[tmp0], 0x01 \n\t" -#endif PTR_SUBU "%[tmp0], %[tmp0], %[cabac_mask] \n\t" "li %[tmp1], 0x07 \n\t" @@ -94,10 +83,13 @@ static av_always_inline int get_cabac_inline_mips(CABACContext *c, PTR_SLL "%[tmp0], %[tmp0], %[tmp1] \n\t" PTR_ADDU "%[c_low], %[c_low], %[tmp0] \n\t" -#if !UNCHECKED_BITSTREAM_READER - "bge %[c_bytestream], %[c_bytestream_end], 1f \n\t" +#if UNCHECKED_BITSTREAM_READER + PTR_ADDIU "%[c_bytestream], %[c_bytestream], 0x02 \n\t" +#else + "slt %[tmp0], %[c_bytestream], %[c_bytestream_end] \n\t" + PTR_ADDIU "%[tmp2], %[c_bytestream], 0x02 \n\t" + "movn %[c_bytestream], %[tmp2], %[tmp0] \n\t" #endif - PTR_ADDIU "%[c_bytestream], %[c_bytestream], 0X02 \n\t" "1: \n\t" : [bit]"=&r"(bit), [tmp0]"=&r"(tmp0), [tmp1]"=&r"(tmp1), [tmp2]"=&r"(tmp2), [c_range]"+&r"(c->range), [c_low]"+&r"(c->low), @@ -116,4 +108,85 @@ static av_always_inline int get_cabac_inline_mips(CABACContext *c, return bit; } +#define get_cabac_bypass get_cabac_bypass_mips +static av_always_inline int get_cabac_bypass_mips(CABACContext *c) +{ + mips_reg tmp0, tmp1; + int res = 0; + __asm__ volatile( + PTR_SLL "%[c_low], %[c_low], 0x01 \n\t" + "and %[tmp0], %[c_low], %[cabac_mask] \n\t" + "bnez %[tmp0], 1f \n\t" + "lhu %[tmp1], 0(%[c_bytestream]) \n\t" + "wsbh %[tmp1], %[tmp1] \n\t" + PTR_SLL "%[tmp1], %[tmp1], 0x01 \n\t" + PTR_SUBU "%[tmp1], %[tmp1], %[cabac_mask] \n\t" + PTR_ADDU "%[c_low], %[c_low], %[tmp1] \n\t" +#if UNCHECKED_BITSTREAM_READER + PTR_ADDIU "%[c_bytestream], %[c_bytestream], 0x02 \n\t" +#else + "slt %[tmp0], %[c_bytestream], %[c_bytestream_end] \n\t" + PTR_ADDIU "%[tmp1], %[c_bytestream], 0x02 \n\t" + "movn %[c_bytestream], %[tmp1], %[tmp0] \n\t" +#endif + "1: \n\t" + PTR_SLL "%[tmp1], %[c_range], 0x11 \n\t" + "slt %[tmp0], %[c_low], %[tmp1] \n\t" + PTR_SUBU "%[tmp1], %[c_low], %[tmp1] \n\t" + "movz %[res], %[one], %[tmp0] \n\t" + "movz %[c_low], %[tmp1], %[tmp0] \n\t" + : [tmp0]"=&r"(tmp0), [tmp1]"=&r"(tmp1), [res]"+&r"(res), + [c_range]"+&r"(c->range), [c_low]"+&r"(c->low), + [c_bytestream]"+&r"(c->bytestream) + : [cabac_mask]"r"(CABAC_MASK), +#if !UNCHECKED_BITSTREAM_READER + [c_bytestream_end]"r"(c->bytestream_end), +#endif + [one]"r"(0x01) + : "memory" + ); + return res; +} + +#define get_cabac_bypass_sign get_cabac_bypass_sign_mips +static av_always_inline int get_cabac_bypass_sign_mips(CABACContext *c, int val) +{ + mips_reg tmp0, tmp1; + int res = val; + __asm__ volatile( + PTR_SLL "%[c_low], %[c_low], 0x01 \n\t" + "and %[tmp0], %[c_low], %[cabac_mask] \n\t" + "bnez %[tmp0], 1f \n\t" + "lhu %[tmp1], 0(%[c_bytestream]) \n\t" + "wsbh %[tmp1], %[tmp1] \n\t" + PTR_SLL "%[tmp1], %[tmp1], 0x01 \n\t" + PTR_SUBU "%[tmp1], %[tmp1], %[cabac_mask] \n\t" + PTR_ADDU "%[c_low], %[c_low], %[tmp1] \n\t" +#if UNCHECKED_BITSTREAM_READER + PTR_ADDIU "%[c_bytestream], %[c_bytestream], 0x02 \n\t" +#else + "slt %[tmp0], %[c_bytestream], %[c_bytestream_end] \n\t" + PTR_ADDIU "%[tmp1], %[c_bytestream], 0x02 \n\t" + "movn %[c_bytestream], %[tmp1], %[tmp0] \n\t" +#endif + "1: \n\t" + PTR_SLL "%[tmp1], %[c_range], 0x11 \n\t" + "slt %[tmp0], %[c_low], %[tmp1] \n\t" + PTR_SUBU "%[tmp1], %[c_low], %[tmp1] \n\t" + "movz %[c_low], %[tmp1], %[tmp0] \n\t" + PTR_SUBU "%[tmp1], %[zero], %[res] \n\t" + "movn %[res], %[tmp1], %[tmp0] \n\t" + : [tmp0]"=&r"(tmp0), [tmp1]"=&r"(tmp1), [res]"+&r"(res), + [c_range]"+&r"(c->range), [c_low]"+&r"(c->low), + [c_bytestream]"+&r"(c->bytestream) + : [cabac_mask]"r"(CABAC_MASK), +#if !UNCHECKED_BITSTREAM_READER + [c_bytestream_end]"r"(c->bytestream_end), +#endif + [zero]"r"(0x0) + : "memory" + ); + + return res; +} #endif /* AVCODEC_MIPS_CABAC_H */ From patchwork Tue Oct 20 03:45:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shiyou Yin X-Patchwork-Id: 23105 Return-Path: X-Original-To: patchwork@ffaux-bg.ffmpeg.org Delivered-To: patchwork@ffaux-bg.ffmpeg.org Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org [79.124.17.100]) by ffaux.localdomain (Postfix) with ESMTP id 48214448C9D for ; Tue, 20 Oct 2020 06:46:02 +0300 (EEST) Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 3820268B797; Tue, 20 Oct 2020 06:46:02 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 5851668B31F for ; Tue, 20 Oct 2020 06:45:51 +0300 (EEST) Received: from localhost (unknown [36.33.26.144]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9DxX9xtXY5frC4fAA--.6710S3; Tue, 20 Oct 2020 11:45:49 +0800 (CST) From: Shiyou Yin To: ffmpeg-devel@ffmpeg.org Date: Tue, 20 Oct 2020 11:45:43 +0800 Message-Id: <1603165544-8541-4-git-send-email-yinshiyou-hf@loongson.cn> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1603165544-8541-1-git-send-email-yinshiyou-hf@loongson.cn> References: <1603165544-8541-1-git-send-email-yinshiyou-hf@loongson.cn> X-CM-TRANSID: AQAAf9DxX9xtXY5frC4fAA--.6710S3 X-Coremail-Antispam: 1UD129KBjvJXoW3Jr1UKr1xAF1DAFWUJFy7ZFb_yoW3KFy3p3 WUu3W3Gr18J3yakas3Jr4kC3WayF95tFy8AFyUXw1jq39rX348ZFZ3KFZ3X3WkWr9FqF13 Ww1Fg347A3W7C3DanT9S1TB71UUUUUDqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUkm14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26ryj6F1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26F4j 6r4UJwA2z4x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv6xkF7I0E14v26F 4UJVW0owAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv 7VC0I7IYx2IY67AKxVWUAVWUtwAv7VC2z280aVAFwI0_Gr0_Cr1lOx8S6xCaFVCjc4AY6r 1j6r4UM4x0Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwCY02Avz4vE14v_ Gr4l42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxV WUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1Y6r17MIIYrxkI 7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r 1j6r4UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI 42IY6I8E87Iv6xkF7I0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjfUjKsUDUUUU X-CM-SenderInfo: p1lq2x5l1r3gtki6z05rqj20fqof0/ Subject: [FFmpeg-devel] [PATCH v3 3/4] avcodec/mips: Optimize function ff_h264_loop_filter_strength_msa. X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Cc: gxw MIME-Version: 1.0 Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" From: gxw Speed of decoding H264: 5.45x ==> 5.53x Signed-off-by: Shiyou Yin --- libavcodec/mips/Makefile | 3 +- libavcodec/mips/h264_deblock_msa.c | 153 ++++++++++++++++++++++++++++++++++++ libavcodec/mips/h264dsp_init_mips.c | 2 + libavcodec/mips/h264dsp_mips.h | 4 + 4 files changed, 161 insertions(+), 1 deletion(-) create mode 100644 libavcodec/mips/h264_deblock_msa.c diff --git a/libavcodec/mips/Makefile b/libavcodec/mips/Makefile index 2be4d9b..81a73a4 100644 --- a/libavcodec/mips/Makefile +++ b/libavcodec/mips/Makefile @@ -57,7 +57,8 @@ MSA-OBJS-$(CONFIG_VP8_DECODER) += mips/vp8_mc_msa.o \ mips/vp8_lpf_msa.o MSA-OBJS-$(CONFIG_VP3DSP) += mips/vp3dsp_idct_msa.o MSA-OBJS-$(CONFIG_H264DSP) += mips/h264dsp_msa.o \ - mips/h264idct_msa.o + mips/h264idct_msa.o \ + mips/h264_deblock_msa.o MSA-OBJS-$(CONFIG_H264QPEL) += mips/h264qpel_msa.o MSA-OBJS-$(CONFIG_H264CHROMA) += mips/h264chroma_msa.o MSA-OBJS-$(CONFIG_H264PRED) += mips/h264pred_msa.o diff --git a/libavcodec/mips/h264_deblock_msa.c b/libavcodec/mips/h264_deblock_msa.c new file mode 100644 index 0000000..4fed55c --- /dev/null +++ b/libavcodec/mips/h264_deblock_msa.c @@ -0,0 +1,153 @@ +/* + * MIPS SIMD optimized H.264 deblocking code + * + * Copyright (c) 2020 Loongson Technology Corporation Limited + * Gu Xiwei + * + * This file is part of FFmpeg. + * + * FFmpeg is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * FFmpeg is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with FFmpeg; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include "libavcodec/bit_depth_template.c" +#include "h264dsp_mips.h" +#include "libavutil/mips/generic_macros_msa.h" +#include "libavcodec/mips/h264dsp_mips.h" + +#define h264_loop_filter_strength_iteration_msa(edges, step, mask_mv, dir, \ + d_idx, mask_dir) \ +do { \ + int b_idx = 0; \ + int step_x4 = step << 2; \ + int d_idx_12 = d_idx + 12; \ + int d_idx_52 = d_idx + 52; \ + int d_idx_x4 = d_idx << 2; \ + int d_idx_x4_48 = d_idx_x4 + 48; \ + int dir_x32 = dir * 32; \ + uint8_t *ref_t = (uint8_t*)ref; \ + uint8_t *mv_t = (uint8_t*)mv; \ + uint8_t *nnz_t = (uint8_t*)nnz; \ + uint8_t *bS_t = (uint8_t*)bS; \ + mask_mv <<= 3; \ + for (; b_idx < edges; b_idx += step) { \ + out &= mask_dir; \ + if (!(mask_mv & b_idx)) { \ + if (bidir) { \ + ref_2 = LD_SB(ref_t + d_idx_12); \ + ref_3 = LD_SB(ref_t + d_idx_52); \ + ref_0 = LD_SB(ref_t + 12); \ + ref_1 = LD_SB(ref_t + 52); \ + ref_2 = (v16i8)__msa_ilvr_w((v4i32)ref_3, (v4i32)ref_2); \ + ref_0 = (v16i8)__msa_ilvr_w((v4i32)ref_0, (v4i32)ref_0); \ + ref_1 = (v16i8)__msa_ilvr_w((v4i32)ref_1, (v4i32)ref_1); \ + ref_3 = (v16i8)__msa_shf_h((v8i16)ref_2, 0x4e); \ + ref_0 -= ref_2; \ + ref_1 -= ref_3; \ + ref_0 = (v16i8)__msa_or_v((v16u8)ref_0, (v16u8)ref_1); \ +\ + tmp_2 = LD_SH(mv_t + d_idx_x4_48); \ + tmp_3 = LD_SH(mv_t + 48); \ + tmp_4 = LD_SH(mv_t + 208); \ + tmp_5 = tmp_2 - tmp_3; \ + tmp_6 = tmp_2 - tmp_4; \ + SAT_SH2_SH(tmp_5, tmp_6, 7); \ + tmp_0 = __msa_pckev_b((v16i8)tmp_6, (v16i8)tmp_5); \ + tmp_0 += cnst_1; \ + tmp_0 = (v16i8)__msa_subs_u_b((v16u8)tmp_0, (v16u8)cnst_0);\ + tmp_0 = (v16i8)__msa_sat_s_h((v8i16)tmp_0, 7); \ + tmp_0 = __msa_pckev_b(tmp_0, tmp_0); \ + out = (v16i8)__msa_or_v((v16u8)ref_0, (v16u8)tmp_0); \ +\ + tmp_2 = LD_SH(mv_t + 208 + d_idx_x4); \ + tmp_5 = tmp_2 - tmp_3; \ + tmp_6 = tmp_2 - tmp_4; \ + SAT_SH2_SH(tmp_5, tmp_6, 7); \ + tmp_1 = __msa_pckev_b((v16i8)tmp_6, (v16i8)tmp_5); \ + tmp_1 += cnst_1; \ + tmp_1 = (v16i8)__msa_subs_u_b((v16u8)tmp_1, (v16u8)cnst_0); \ + tmp_1 = (v16i8)__msa_sat_s_h((v8i16)tmp_1, 7); \ + tmp_1 = __msa_pckev_b(tmp_1, tmp_1); \ +\ + tmp_1 = (v16i8)__msa_shf_h((v8i16)tmp_1, 0x4e); \ + out = (v16i8)__msa_or_v((v16u8)out, (v16u8)tmp_1); \ + tmp_0 = (v16i8)__msa_shf_h((v8i16)out, 0x4e); \ + out = (v16i8)__msa_min_u_b((v16u8)out, (v16u8)tmp_0); \ + } else { \ + ref_0 = LD_SB(ref_t + d_idx_12); \ + ref_3 = LD_SB(ref_t + 12); \ + tmp_2 = LD_SH(mv_t + d_idx_x4_48); \ + tmp_3 = LD_SH(mv_t + 48); \ + tmp_4 = tmp_3 - tmp_2; \ + tmp_1 = (v16i8)__msa_sat_s_h(tmp_4, 7); \ + tmp_1 = __msa_pckev_b(tmp_1, tmp_1); \ + tmp_1 += cnst_1; \ + out = (v16i8)__msa_subs_u_b((v16u8)tmp_1, (v16u8)cnst_0); \ + out = (v16i8)__msa_sat_s_h((v8i16)out, 7); \ + out = __msa_pckev_b(out, out); \ + ref_0 = ref_3 - ref_0; \ + out = (v16i8)__msa_or_v((v16u8)out, (v16u8)ref_0); \ + } \ + } \ + tmp_0 = LD_SB(nnz_t + 12); \ + tmp_1 = LD_SB(nnz_t + d_idx_12); \ + tmp_0 = (v16i8)__msa_or_v((v16u8)tmp_0, (v16u8)tmp_1); \ + tmp_0 = (v16i8)__msa_min_u_b((v16u8)tmp_0, (v16u8)cnst_2); \ + out = (v16i8)__msa_min_u_b((v16u8)out, (v16u8)cnst_2); \ + tmp_0 = (v16i8)((v8i16)tmp_0 << 1); \ + tmp_0 = (v16i8)__msa_max_u_b((v16u8)out, (v16u8)tmp_0); \ + tmp_0 = __msa_ilvr_b(zero, tmp_0); \ + ST_D1(tmp_0, 0, bS_t + dir_x32); \ + ref_t += step; \ + mv_t += step_x4; \ + nnz_t += step; \ + bS_t += step; \ + } \ +} while(0) + +void ff_h264_loop_filter_strength_msa(int16_t bS[2][4][4], uint8_t nnz[40], + int8_t ref[2][40], int16_t mv[2][40][2], + int bidir, int edges, int step, + int mask_mv0, int mask_mv1, int field) +{ + v16i8 out; + v16i8 ref_0, ref_1, ref_2, ref_3; + v16i8 tmp_0, tmp_1; + v8i16 tmp_2, tmp_3, tmp_4, tmp_5, tmp_6; + v16i8 cnst_0, cnst_1, cnst_2; + v16i8 zero = { 0 }; + v16i8 one = __msa_fill_b(0xff); + if (field) { + cnst_0 = (v16i8)__msa_fill_h(0x206); + cnst_1 = (v16i8)__msa_fill_h(0x103); + cnst_2 = (v16i8)__msa_fill_h(0x101); + } else { + cnst_0 = __msa_fill_b(0x6); + cnst_1 = __msa_fill_b(0x3); + cnst_2 = __msa_fill_b(0x1); + } + step <<= 3; + edges <<= 3; + + h264_loop_filter_strength_iteration_msa(edges, step, mask_mv1, 1, -8, zero); + h264_loop_filter_strength_iteration_msa(32, 8, mask_mv0, 0, -1, one); + + LD_SB2((int8_t*)bS, 16, tmp_0, tmp_1); + tmp_2 = (v8i16)__msa_ilvl_d((v2i64)tmp_0, (v2i64)tmp_0); + tmp_3 = (v8i16)__msa_ilvl_d((v2i64)tmp_1, (v2i64)tmp_1); + TRANSPOSE4x4_SH_SH(tmp_0, tmp_2, tmp_1, tmp_3, tmp_2, tmp_3, tmp_4, tmp_5); + tmp_0 = (v16i8)__msa_ilvr_d((v2i64)tmp_3, (v2i64)tmp_2); + tmp_1 = (v16i8)__msa_ilvr_d((v2i64)tmp_5, (v2i64)tmp_4); + ST_SB2(tmp_0, tmp_1, (int8_t*)bS, 16); +} diff --git a/libavcodec/mips/h264dsp_init_mips.c b/libavcodec/mips/h264dsp_init_mips.c index 9cd05e0..f822c38 100644 --- a/libavcodec/mips/h264dsp_init_mips.c +++ b/libavcodec/mips/h264dsp_init_mips.c @@ -78,6 +78,8 @@ av_cold void ff_h264dsp_init_mips(H264DSPContext *c, const int bit_depth, } if (have_msa(cpu_flags)) { + if (chroma_format_idc <= 1) + c->h264_loop_filter_strength = ff_h264_loop_filter_strength_msa; if (bit_depth == 8) { c->h264_v_loop_filter_luma = ff_h264_v_lpf_luma_inter_msa; c->h264_h_loop_filter_luma = ff_h264_h_lpf_luma_inter_msa; diff --git a/libavcodec/mips/h264dsp_mips.h b/libavcodec/mips/h264dsp_mips.h index 35e16c4..5847ef3 100644 --- a/libavcodec/mips/h264dsp_mips.h +++ b/libavcodec/mips/h264dsp_mips.h @@ -319,6 +319,10 @@ void ff_vp8_pred8x8_129_dc_8_msa(uint8_t *src, ptrdiff_t stride); void ff_vp8_pred16x16_127_dc_8_msa(uint8_t *src, ptrdiff_t stride); void ff_vp8_pred16x16_129_dc_8_msa(uint8_t *src, ptrdiff_t stride); +void ff_h264_loop_filter_strength_msa(int16_t bS[2][4][4], uint8_t nnz[40], + int8_t ref[2][40], int16_t mv[2][40][2], int bidir, int edges, + int step, int mask_mv0, int mask_mv1, int field); + void ff_h264_add_pixels4_8_mmi(uint8_t *_dst, int16_t *_src, int stride); void ff_h264_idct_add_8_mmi(uint8_t *dst, int16_t *block, int stride); void ff_h264_idct8_add_8_mmi(uint8_t *dst, int16_t *block, int stride); From patchwork Tue Oct 20 03:45:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shiyou Yin X-Patchwork-Id: 23106 Return-Path: X-Original-To: patchwork@ffaux-bg.ffmpeg.org Delivered-To: patchwork@ffaux-bg.ffmpeg.org Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org [79.124.17.100]) by ffaux.localdomain (Postfix) with ESMTP id 0E4A7448C9D for ; Tue, 20 Oct 2020 06:46:03 +0300 (EEST) Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id EE47068B7BB; Tue, 20 Oct 2020 06:46:02 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id E9C8168AE80 for ; Tue, 20 Oct 2020 06:45:52 +0300 (EEST) Received: from localhost (unknown [36.33.26.144]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9DxX8duXY5frS4fAA--.17634S3; Tue, 20 Oct 2020 11:45:50 +0800 (CST) From: Shiyou Yin To: ffmpeg-devel@ffmpeg.org Date: Tue, 20 Oct 2020 11:45:44 +0800 Message-Id: <1603165544-8541-5-git-send-email-yinshiyou-hf@loongson.cn> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1603165544-8541-1-git-send-email-yinshiyou-hf@loongson.cn> References: <1603165544-8541-1-git-send-email-yinshiyou-hf@loongson.cn> X-CM-TRANSID: AQAAf9DxX8duXY5frS4fAA--.17634S3 X-Coremail-Antispam: 1UD129KBjvJXoW3Xr13JFWDWr1xKry8KryfZwb_yoW7Xr4Dpr 4fuayS9348WFyj9wnrJ395Cw15trs7GFW2yFWUGw1fW3s8Ca47tr9aqr4fZFyUWFWrAF17 Was7Kw17GrsxAr7anT9S1TB71UUUUUDqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUkIb7Iv0xC_Kw4lb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rw A2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xII jxv20xvEc7CjxVAFwI0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4 vEx4A2jsIEc7CjxVAFwI0_Cr1j6rxdM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVAC Y4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r126r1DMcIj6I8E87Iv67AKxVW8JV WxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41lc2xSY4AK67AK6r48MxAI w28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr 4lx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUJVWUXwCIc40Y0x0EwIxG rwCI42IY6xIIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVWUJVW8Jw CI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Gr0_Cr1lIxAIcVC2 z280aVCY1x0267AKxVW8JVW8JrUvcSsGvfC2KfnxnUUI43ZEXa7IUY83ktUUUUU== X-CM-SenderInfo: p1lq2x5l1r3gtki6z05rqj20fqof0/ Subject: [FFmpeg-devel] [PATCH v3 4/4] Fix potential illegal instruction error. X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches MIME-Version: 1.0 Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" MSA2 optimizations are attached to MSA macros in generic_macros_msa.h. It's difficult to do runtime check for them. Remove this part of code can make it more robust. Impact on performance is not obvious(167fps==>166fps). --- configure | 7 +------ libavutil/mips/generic_macros_msa.h | 37 ------------------------------------- 2 files changed, 1 insertion(+), 43 deletions(-) diff --git a/configure b/configure index 8e451ca..f1f8ee9 100755 --- a/configure +++ b/configure @@ -450,7 +450,6 @@ Optimization options (experts only): --disable-mipsdsp disable MIPS DSP ASE R1 optimizations --disable-mipsdspr2 disable MIPS DSP ASE R2 optimizations --disable-msa disable MSA optimizations - --disable-msa2 disable MSA2 optimizations --disable-mipsfpu disable floating point MIPS optimizations --disable-mmi disable Loongson SIMD optimizations --disable-fast-unaligned consider unaligned accesses slow @@ -2023,7 +2022,6 @@ ARCH_EXT_LIST_MIPS=" mipsdsp mipsdspr2 msa - msa2 " ARCH_EXT_LIST_LOONGSON=" @@ -2560,7 +2558,6 @@ mipsdsp_deps="mips" mipsdspr2_deps="mips" mmi_deps_any="loongson2 loongson3" msa_deps="mipsfpu" -msa2_deps="msa" cpunop_deps="i686" x86_64_select="i686" @@ -5886,9 +5883,8 @@ elif enabled mips; then enabled mipsdsp && check_inline_asm_flags mipsdsp '"addu.qb $t0, $t1, $t2"' '-mdsp' enabled mipsdspr2 && check_inline_asm_flags mipsdspr2 '"absq_s.qb $t0, $t1"' '-mdspr2' - # MSA and MSA2 can be detected at runtime so we supply extra flags here + # MSA can be detected at runtime so we supply extra flags here enabled mipsfpu && enabled msa && check_inline_asm msa '"addvi.b $w0, $w1, 1"' '-mmsa' && append MSAFLAGS '-mmsa' - enabled msa && enabled msa2 && check_inline_asm msa2 '"nxbits.any.b $w0, $w0"' '-mmsa2' && append MSAFLAGS '-mmsa2' # loongson2 have no switch cflag so we can only probe toolchain ability enabled loongson2 && check_inline_asm loongson2 '"dmult.g $8, $9, $10"' && disable loongson3 @@ -7312,7 +7308,6 @@ if enabled mips; then echo "MIPS DSP R1 enabled ${mipsdsp-no}" echo "MIPS DSP R2 enabled ${mipsdspr2-no}" echo "MIPS MSA enabled ${msa-no}" - echo "MIPS MSA2 enabled ${msa2-no}" echo "LOONGSON MMI enabled ${mmi-no}" fi if enabled ppc; then diff --git a/libavutil/mips/generic_macros_msa.h b/libavutil/mips/generic_macros_msa.h index bb25e9f..1486f72 100644 --- a/libavutil/mips/generic_macros_msa.h +++ b/libavutil/mips/generic_macros_msa.h @@ -25,10 +25,6 @@ #include #include -#if HAVE_MSA2 -#include -#endif - #define ALIGNMENT 16 #define ALLOC_ALIGNED(align) __attribute__ ((aligned((align) << 1))) @@ -1119,15 +1115,6 @@ unsigned absolute diff values, even-odd pairs are added together to generate 8 halfword results. */ -#if HAVE_MSA2 -#define SAD_UB2_UH(in0, in1, ref0, ref1) \ -( { \ - v8u16 sad_m = { 0 }; \ - sad_m += __builtin_msa2_sad_adj2_u_w2x_b((v16u8) in0, (v16u8) ref0); \ - sad_m += __builtin_msa2_sad_adj2_u_w2x_b((v16u8) in1, (v16u8) ref1); \ - sad_m; \ -} ) -#else #define SAD_UB2_UH(in0, in1, ref0, ref1) \ ( { \ v16u8 diff0_m, diff1_m; \ @@ -1141,7 +1128,6 @@ \ sad_m; \ } ) -#endif // #if HAVE_MSA2 /* Description : Insert specified word elements from input vectors to 1 destination vector @@ -2183,12 +2169,6 @@ extracted and interleaved with same vector 'in0' to generate 4 word elements keeping sign intact */ -#if HAVE_MSA2 -#define UNPCK_R_SH_SW(in, out) \ -{ \ - out = (v4i32) __builtin_msa2_w2x_lo_s_h((v8i16) in); \ -} -#else #define UNPCK_R_SH_SW(in, out) \ { \ v8i16 sign_m; \ @@ -2196,7 +2176,6 @@ sign_m = __msa_clti_s_h((v8i16) in, 0); \ out = (v4i32) __msa_ilvr_h(sign_m, (v8i16) in); \ } -#endif // #if HAVE_MSA2 /* Description : Sign extend byte elements from input vector and return halfword results in pair of vectors @@ -2209,13 +2188,6 @@ Then interleaved left with same vector 'in0' to generate 8 signed halfword elements in 'out1' */ -#if HAVE_MSA2 -#define UNPCK_SB_SH(in, out0, out1) \ -{ \ - out0 = (v4i32) __builtin_msa2_w2x_lo_s_b((v16i8) in); \ - out1 = (v4i32) __builtin_msa2_w2x_hi_s_b((v16i8) in); \ -} -#else #define UNPCK_SB_SH(in, out0, out1) \ { \ v16i8 tmp_m; \ @@ -2223,7 +2195,6 @@ tmp_m = __msa_clti_s_b((v16i8) in, 0); \ ILVRL_B2_SH(tmp_m, in, out0, out1); \ } -#endif // #if HAVE_MSA2 /* Description : Zero extend unsigned byte elements to halfword elements Arguments : Inputs - in (1 input unsigned byte vector) @@ -2250,13 +2221,6 @@ Then interleaved left with same vector 'in0' to generate 4 signed word elements in 'out1' */ -#if HAVE_MSA2 -#define UNPCK_SH_SW(in, out0, out1) \ -{ \ - out0 = (v4i32) __builtin_msa2_w2x_lo_s_h((v8i16) in); \ - out1 = (v4i32) __builtin_msa2_w2x_hi_s_h((v8i16) in); \ -} -#else #define UNPCK_SH_SW(in, out0, out1) \ { \ v8i16 tmp_m; \ @@ -2264,7 +2228,6 @@ tmp_m = __msa_clti_s_h((v8i16) in, 0); \ ILVRL_H2_SW(tmp_m, in, out0, out1); \ } -#endif // #if HAVE_MSA2 /* Description : Swap two variables Arguments : Inputs - in0, in1