From patchwork Tue Mar 30 12:51:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shiyou Yin X-Patchwork-Id: 26661 Return-Path: X-Original-To: patchwork@ffaux-bg.ffmpeg.org Delivered-To: patchwork@ffaux-bg.ffmpeg.org Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org [79.124.17.100]) by ffaux.localdomain (Postfix) with ESMTP id 503CB44BD83 for ; Tue, 30 Mar 2021 15:52:10 +0300 (EEST) Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 2558E688128; Tue, 30 Mar 2021 15:52:10 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id DAF5C688128 for ; Tue, 30 Mar 2021 15:52:02 +0300 (EEST) Received: from localhost (unknown [36.33.26.144]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9CxycnwHmNgAWQCAA--.5741S3; Tue, 30 Mar 2021 20:52:00 +0800 (CST) From: Shiyou Yin To: ffmpeg-devel@ffmpeg.org Date: Tue, 30 Mar 2021 20:51:51 +0800 Message-Id: <1617108715-24232-2-git-send-email-yinshiyou-hf@loongson.cn> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1617108715-24232-1-git-send-email-yinshiyou-hf@loongson.cn> References: <1617108715-24232-1-git-send-email-yinshiyou-hf@loongson.cn> X-CM-TRANSID: AQAAf9CxycnwHmNgAWQCAA--.5741S3 X-Coremail-Antispam: 1UD129KBjvJXoW7CrW5XF4kKw43tr1rCrW5trb_yoW8AFWUpF 1UAF17Gr4xGrZakr4xGr4Y9Fy3Jw1FqrWYyF9rKan7A3y5Xrs7Kr9xJ34kCrWUJFZFkF95 XryDWry5G3WkCFUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUkFb7Iv0xC_tr1lb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rw A2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xII jxv20xvEc7CjxVAFwI0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I 8E87Iv6xkF7I0E14v26rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI 64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r126r1DMcIj6I8E87Iv67AKxVWxJVW8Jr 1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0Y48IcxkI7VAKI48JMxkIecxEwVAFwVW5JwCF04k2 0xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI 8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jr0_JrylIxkGc2Ij64vIr41l IxAIcVC0I7IYx2IY67AKxVWUCVW8JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIx AIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4A2 jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07jYVbkUUUUU= X-CM-SenderInfo: p1lq2x5l1r3gtki6z05rqj20fqof0/ Subject: [FFmpeg-devel] [PATCH v3 1/5] avcodec/mips: Restore the initialization sequence of MSA and MMI in ff_h264chroma_init_mips. X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches MIME-Version: 1.0 Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" The MSA optimization has been refined in commit 93218c2 and ce0a52e. It is better than MMI version now. Speed of decoding H264: 4.83x ==> 4.89x (tested on 3A4000). --- libavcodec/mips/h264chroma_init_mips.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/libavcodec/mips/h264chroma_init_mips.c b/libavcodec/mips/h264chroma_init_mips.c index 6bb19d3..755cc04 100644 --- a/libavcodec/mips/h264chroma_init_mips.c +++ b/libavcodec/mips/h264chroma_init_mips.c @@ -28,7 +28,15 @@ av_cold void ff_h264chroma_init_mips(H264ChromaContext *c, int bit_depth) int cpu_flags = av_get_cpu_flags(); int high_bit_depth = bit_depth > 8; - /* MMI apears to be faster than MSA here */ + if (have_mmi(cpu_flags)) { + if (!high_bit_depth) { + c->put_h264_chroma_pixels_tab[0] = ff_put_h264_chroma_mc8_mmi; + c->avg_h264_chroma_pixels_tab[0] = ff_avg_h264_chroma_mc8_mmi; + c->put_h264_chroma_pixels_tab[1] = ff_put_h264_chroma_mc4_mmi; + c->avg_h264_chroma_pixels_tab[1] = ff_avg_h264_chroma_mc4_mmi; + } + } + if (have_msa(cpu_flags)) { if (!high_bit_depth) { c->put_h264_chroma_pixels_tab[0] = ff_put_h264_chroma_mc8_msa; @@ -40,13 +48,4 @@ av_cold void ff_h264chroma_init_mips(H264ChromaContext *c, int bit_depth) c->avg_h264_chroma_pixels_tab[2] = ff_avg_h264_chroma_mc2_msa; } } - - if (have_mmi(cpu_flags)) { - if (!high_bit_depth) { - c->put_h264_chroma_pixels_tab[0] = ff_put_h264_chroma_mc8_mmi; - c->avg_h264_chroma_pixels_tab[0] = ff_avg_h264_chroma_mc8_mmi; - c->put_h264_chroma_pixels_tab[1] = ff_put_h264_chroma_mc4_mmi; - c->avg_h264_chroma_pixels_tab[1] = ff_avg_h264_chroma_mc4_mmi; - } - } } From patchwork Tue Mar 30 12:51:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shiyou Yin X-Patchwork-Id: 26662 Return-Path: X-Original-To: patchwork@ffaux-bg.ffmpeg.org Delivered-To: patchwork@ffaux-bg.ffmpeg.org Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org [79.124.17.100]) by ffaux.localdomain (Postfix) with ESMTP id BB26B44BD83 for ; Tue, 30 Mar 2021 15:52:13 +0300 (EEST) Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id A2F9468A03E; Tue, 30 Mar 2021 15:52:13 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id D6D52680A4D for ; Tue, 30 Mar 2021 15:52:04 +0300 (EEST) Received: from localhost (unknown [36.33.26.144]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9Cx2cnxHmNgAmQCAA--.5703S3; Tue, 30 Mar 2021 20:52:01 +0800 (CST) From: Shiyou Yin To: ffmpeg-devel@ffmpeg.org Date: Tue, 30 Mar 2021 20:51:52 +0800 Message-Id: <1617108715-24232-3-git-send-email-yinshiyou-hf@loongson.cn> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1617108715-24232-1-git-send-email-yinshiyou-hf@loongson.cn> References: <1617108715-24232-1-git-send-email-yinshiyou-hf@loongson.cn> X-CM-TRANSID: AQAAf9Cx2cnxHmNgAmQCAA--.5703S3 X-Coremail-Antispam: 1UD129KBjvJXoWxtr15Gw4xZw13XFWrKr17ZFb_yoWxKF1fpr y8Grs0yrWavFW7CFZxJF4xGrnxZF48tw18WFyUtF18Ars0vr1rurZ7GryxWw1rGFykuFWa vF1UZFy3CF47Zw7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUkFb7Iv0xC_KF4lb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rw A2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xII jxv20xvEc7CjxVAFwI0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I 8E87Iv6xkF7I0E14v26rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI 64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1q6rW5McIj6I8E87Iv67AKxVWxJVW8Jr 1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0Y48IcxkI7VAKI48JMxkIecxEwVAFwVW5JwCF04k2 0xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI 8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jr0_JrylIxkGc2Ij64vIr41l IxAIcVC0I7IYx2IY67AKxVWUCVW8JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1lIx AIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4A2 jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07joFALUUUUU= X-CM-SenderInfo: p1lq2x5l1r3gtki6z05rqj20fqof0/ Subject: [FFmpeg-devel] [PATCH v3 2/5] avcodec/mips: Refine get_cabac_inline_mips. X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches MIME-Version: 1.0 Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" 1. Refined function get_cabac_inline_mips. 2. Optimize function get_cabac_bypass and get_cabac_bypass_sign. Speed of decoding h264: 4.89x ==> 5.05x(tested on 3A4000). --- libavcodec/mips/cabac.h | 131 +++++++++++++++++++++++++++++++++++++----------- 1 file changed, 102 insertions(+), 29 deletions(-) diff --git a/libavcodec/mips/cabac.h b/libavcodec/mips/cabac.h index 3d09e93..0ee7594 100644 --- a/libavcodec/mips/cabac.h +++ b/libavcodec/mips/cabac.h @@ -2,7 +2,8 @@ * Loongson SIMD optimized h264chroma * * Copyright (c) 2018 Loongson Technology Corporation Limited - * Copyright (c) 2018 Shiyou Yin + * Contributed by Shiyou Yin + * Gu Xiwei(guxiwei-hf@loongson.cn) * * This file is part of FFmpeg. * @@ -25,18 +26,18 @@ #define AVCODEC_MIPS_CABAC_H #include "libavcodec/cabac.h" -#include "libavutil/mips/asmdefs.h" +#include "libavutil/mips/mmiutils.h" #include "config.h" #define get_cabac_inline get_cabac_inline_mips static av_always_inline int get_cabac_inline_mips(CABACContext *c, - uint8_t * const state){ + uint8_t * const state){ mips_reg tmp0, tmp1, tmp2, bit; __asm__ volatile ( "lbu %[bit], 0(%[state]) \n\t" "and %[tmp0], %[c_range], 0xC0 \n\t" - PTR_ADDU "%[tmp0], %[tmp0], %[tmp0] \n\t" + PTR_SLL "%[tmp0], %[tmp0], 0x01 \n\t" PTR_ADDU "%[tmp0], %[tmp0], %[tables] \n\t" PTR_ADDU "%[tmp0], %[tmp0], %[bit] \n\t" /* tmp1: RangeLPS */ @@ -44,18 +45,11 @@ static av_always_inline int get_cabac_inline_mips(CABACContext *c, PTR_SUBU "%[c_range], %[c_range], %[tmp1] \n\t" PTR_SLL "%[tmp0], %[c_range], 0x11 \n\t" - PTR_SUBU "%[tmp0], %[tmp0], %[c_low] \n\t" - - /* tmp2: lps_mask */ - PTR_SRA "%[tmp2], %[tmp0], 0x1F \n\t" - /* If tmp0 < 0, lps_mask == 0xffffffff*/ - /* If tmp0 >= 0, lps_mask == 0x00000000*/ + "slt %[tmp2], %[tmp0], %[c_low] \n\t" "beqz %[tmp2], 1f \n\t" - PTR_SLL "%[tmp0], %[c_range], 0x11 \n\t" + "move %[c_range], %[tmp1] \n\t" + "not %[bit], %[bit] \n\t" PTR_SUBU "%[c_low], %[c_low], %[tmp0] \n\t" - PTR_SUBU "%[tmp0], %[tmp1], %[c_range] \n\t" - PTR_ADDU "%[c_range], %[c_range], %[tmp0] \n\t" - "xor %[bit], %[bit], %[tmp2] \n\t" "1: \n\t" /* tmp1: *state */ @@ -70,23 +64,18 @@ static av_always_inline int get_cabac_inline_mips(CABACContext *c, PTR_SLL "%[c_range], %[c_range], %[tmp2] \n\t" PTR_SLL "%[c_low], %[c_low], %[tmp2] \n\t" - "and %[tmp0], %[c_low], %[cabac_mask] \n\t" - "bnez %[tmp0], 1f \n\t" - PTR_ADDIU "%[tmp0], %[c_low], -0x01 \n\t" + "and %[tmp1], %[c_low], %[cabac_mask] \n\t" + "bnez %[tmp1], 1f \n\t" + PTR_ADDIU "%[tmp0], %[c_low], -0X01 \n\t" "xor %[tmp0], %[c_low], %[tmp0] \n\t" PTR_SRA "%[tmp0], %[tmp0], 0x0f \n\t" PTR_ADDU "%[tmp0], %[tmp0], %[tables] \n\t" + /* tmp2: ff_h264_norm_shift[x >> (CABAC_BITS - 1)] */ "lbu %[tmp2], %[norm_off](%[tmp0]) \n\t" -#if CABAC_BITS == 16 - "lbu %[tmp0], 0(%[c_bytestream]) \n\t" - "lbu %[tmp1], 1(%[c_bytestream]) \n\t" - PTR_SLL "%[tmp0], %[tmp0], 0x09 \n\t" - PTR_SLL "%[tmp1], %[tmp1], 0x01 \n\t" - PTR_ADDU "%[tmp0], %[tmp0], %[tmp1] \n\t" -#else - "lbu %[tmp0], 0(%[c_bytestream]) \n\t" + + "lhu %[tmp0], 0(%[c_bytestream]) \n\t" + "wsbh %[tmp0], %[tmp0] \n\t" PTR_SLL "%[tmp0], %[tmp0], 0x01 \n\t" -#endif PTR_SUBU "%[tmp0], %[tmp0], %[cabac_mask] \n\t" "li %[tmp1], 0x07 \n\t" @@ -94,10 +83,13 @@ static av_always_inline int get_cabac_inline_mips(CABACContext *c, PTR_SLL "%[tmp0], %[tmp0], %[tmp1] \n\t" PTR_ADDU "%[c_low], %[c_low], %[tmp0] \n\t" -#if !UNCHECKED_BITSTREAM_READER - "bge %[c_bytestream], %[c_bytestream_end], 1f \n\t" +#if UNCHECKED_BITSTREAM_READER + PTR_ADDIU "%[c_bytestream], %[c_bytestream], 0x02 \n\t" +#else + "slt %[tmp0], %[c_bytestream], %[c_bytestream_end] \n\t" + PTR_ADDIU "%[tmp2], %[c_bytestream], 0x02 \n\t" + "movn %[c_bytestream], %[tmp2], %[tmp0] \n\t" #endif - PTR_ADDIU "%[c_bytestream], %[c_bytestream], 0X02 \n\t" "1: \n\t" : [bit]"=&r"(bit), [tmp0]"=&r"(tmp0), [tmp1]"=&r"(tmp1), [tmp2]"=&r"(tmp2), [c_range]"+&r"(c->range), [c_low]"+&r"(c->low), @@ -116,4 +108,85 @@ static av_always_inline int get_cabac_inline_mips(CABACContext *c, return bit; } +#define get_cabac_bypass get_cabac_bypass_mips +static av_always_inline int get_cabac_bypass_mips(CABACContext *c) +{ + mips_reg tmp0, tmp1; + int res = 0; + __asm__ volatile( + PTR_SLL "%[c_low], %[c_low], 0x01 \n\t" + "and %[tmp0], %[c_low], %[cabac_mask] \n\t" + "bnez %[tmp0], 1f \n\t" + "lhu %[tmp1], 0(%[c_bytestream]) \n\t" + "wsbh %[tmp1], %[tmp1] \n\t" + PTR_SLL "%[tmp1], %[tmp1], 0x01 \n\t" + PTR_SUBU "%[tmp1], %[tmp1], %[cabac_mask] \n\t" + PTR_ADDU "%[c_low], %[c_low], %[tmp1] \n\t" +#if UNCHECKED_BITSTREAM_READER + PTR_ADDIU "%[c_bytestream], %[c_bytestream], 0x02 \n\t" +#else + "slt %[tmp0], %[c_bytestream], %[c_bytestream_end] \n\t" + PTR_ADDIU "%[tmp1], %[c_bytestream], 0x02 \n\t" + "movn %[c_bytestream], %[tmp1], %[tmp0] \n\t" +#endif + "1: \n\t" + PTR_SLL "%[tmp1], %[c_range], 0x11 \n\t" + "slt %[tmp0], %[c_low], %[tmp1] \n\t" + PTR_SUBU "%[tmp1], %[c_low], %[tmp1] \n\t" + "movz %[res], %[one], %[tmp0] \n\t" + "movz %[c_low], %[tmp1], %[tmp0] \n\t" + : [tmp0]"=&r"(tmp0), [tmp1]"=&r"(tmp1), [res]"+&r"(res), + [c_range]"+&r"(c->range), [c_low]"+&r"(c->low), + [c_bytestream]"+&r"(c->bytestream) + : [cabac_mask]"r"(CABAC_MASK), +#if !UNCHECKED_BITSTREAM_READER + [c_bytestream_end]"r"(c->bytestream_end), +#endif + [one]"r"(0x01) + : "memory" + ); + return res; +} + +#define get_cabac_bypass_sign get_cabac_bypass_sign_mips +static av_always_inline int get_cabac_bypass_sign_mips(CABACContext *c, int val) +{ + mips_reg tmp0, tmp1; + int res = val; + __asm__ volatile( + PTR_SLL "%[c_low], %[c_low], 0x01 \n\t" + "and %[tmp0], %[c_low], %[cabac_mask] \n\t" + "bnez %[tmp0], 1f \n\t" + "lhu %[tmp1], 0(%[c_bytestream]) \n\t" + "wsbh %[tmp1], %[tmp1] \n\t" + PTR_SLL "%[tmp1], %[tmp1], 0x01 \n\t" + PTR_SUBU "%[tmp1], %[tmp1], %[cabac_mask] \n\t" + PTR_ADDU "%[c_low], %[c_low], %[tmp1] \n\t" +#if UNCHECKED_BITSTREAM_READER + PTR_ADDIU "%[c_bytestream], %[c_bytestream], 0x02 \n\t" +#else + "slt %[tmp0], %[c_bytestream], %[c_bytestream_end] \n\t" + PTR_ADDIU "%[tmp1], %[c_bytestream], 0x02 \n\t" + "movn %[c_bytestream], %[tmp1], %[tmp0] \n\t" +#endif + "1: \n\t" + PTR_SLL "%[tmp1], %[c_range], 0x11 \n\t" + "slt %[tmp0], %[c_low], %[tmp1] \n\t" + PTR_SUBU "%[tmp1], %[c_low], %[tmp1] \n\t" + "movz %[c_low], %[tmp1], %[tmp0] \n\t" + PTR_SUBU "%[tmp1], %[zero], %[res] \n\t" + "movn %[res], %[tmp1], %[tmp0] \n\t" + : [tmp0]"=&r"(tmp0), [tmp1]"=&r"(tmp1), [res]"+&r"(res), + [c_range]"+&r"(c->range), [c_low]"+&r"(c->low), + [c_bytestream]"+&r"(c->bytestream) + : [cabac_mask]"r"(CABAC_MASK), +#if !UNCHECKED_BITSTREAM_READER + [c_bytestream_end]"r"(c->bytestream_end), +#endif + [zero]"r"(0x0) + : "memory" + ); + + return res; +} #endif /* AVCODEC_MIPS_CABAC_H */ From patchwork Tue Mar 30 12:51:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shiyou Yin X-Patchwork-Id: 26663 Return-Path: X-Original-To: patchwork@ffaux-bg.ffmpeg.org Delivered-To: patchwork@ffaux-bg.ffmpeg.org Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org [79.124.17.100]) by ffaux.localdomain (Postfix) with ESMTP id 0E78B44BD83 for ; Tue, 30 Mar 2021 15:52:16 +0300 (EEST) Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id E82FE68A17B; Tue, 30 Mar 2021 15:52:15 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 09F6868973D for ; Tue, 30 Mar 2021 15:52:06 +0300 (EEST) Received: from localhost (unknown [36.33.26.144]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9AxHcj0HmNgA2QCAA--.2529S3; Tue, 30 Mar 2021 20:52:04 +0800 (CST) From: Shiyou Yin To: ffmpeg-devel@ffmpeg.org Date: Tue, 30 Mar 2021 20:51:53 +0800 Message-Id: <1617108715-24232-4-git-send-email-yinshiyou-hf@loongson.cn> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1617108715-24232-1-git-send-email-yinshiyou-hf@loongson.cn> References: <1617108715-24232-1-git-send-email-yinshiyou-hf@loongson.cn> X-CM-TRANSID: AQAAf9AxHcj0HmNgA2QCAA--.2529S3 X-Coremail-Antispam: 1UD129KBjvJXoW3Jr1UKr1xAF1DAFWUJFy7ZFb_yoW3KFW8p3 WUu3W3Gr18J3ya9as3Jr4kC3WayF95tFy8AFyUXw1UX39rX348ZFZ3KFZ3X3WkWr9FqF13 Ww1Fg347A3W7C3DanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUkq14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26ryj6F1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26F4j 6r4UJwA2z4x0Y4vEx4A2jsIE14v26rxl6s0DM28EF7xvwVC2z280aVCY1x0267AKxVW0oV Cq3wAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0 I7IYx2IY67AKxVWUtVWrXwAv7VC2z280aVAFwI0_Cr0_Gr1UMcvjeVCFs4IE7xkEbVWUJV W8JwACjcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lc2xSY4AK67AK6ryU MxAIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr 0_Jr4lx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUXVWUAwCIc40Y0x0E wIxGrwCI42IY6xIIjxv20xvE14v26r1I6r4UMIIF0xvE2Ix0cI8IcVCY1x0267AKxVW8JV WxJwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Gr0_Cr1lIxAI cVC2z280aVCY1x0267AKxVW8JVW8JrUvcSsGvfC2KfnxnUUI43ZEXa7VUb1SoPUUUUU== X-CM-SenderInfo: p1lq2x5l1r3gtki6z05rqj20fqof0/ Subject: [FFmpeg-devel] [PATCH v3 3/5] avcodec/mips: Optimize function ff_h264_loop_filter_strength_msa. X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Cc: gxw MIME-Version: 1.0 Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" From: gxw Speed of decoding H264 1080P: 5.05x ==> 5.13x Signed-off-by: Shiyou Yin --- libavcodec/mips/Makefile | 3 +- libavcodec/mips/h264_deblock_msa.c | 153 ++++++++++++++++++++++++++++++++++++ libavcodec/mips/h264dsp_init_mips.c | 2 + libavcodec/mips/h264dsp_mips.h | 4 + 4 files changed, 161 insertions(+), 1 deletion(-) create mode 100644 libavcodec/mips/h264_deblock_msa.c diff --git a/libavcodec/mips/Makefile b/libavcodec/mips/Makefile index 2be4d9b..81a73a4 100644 --- a/libavcodec/mips/Makefile +++ b/libavcodec/mips/Makefile @@ -57,7 +57,8 @@ MSA-OBJS-$(CONFIG_VP8_DECODER) += mips/vp8_mc_msa.o \ mips/vp8_lpf_msa.o MSA-OBJS-$(CONFIG_VP3DSP) += mips/vp3dsp_idct_msa.o MSA-OBJS-$(CONFIG_H264DSP) += mips/h264dsp_msa.o \ - mips/h264idct_msa.o + mips/h264idct_msa.o \ + mips/h264_deblock_msa.o MSA-OBJS-$(CONFIG_H264QPEL) += mips/h264qpel_msa.o MSA-OBJS-$(CONFIG_H264CHROMA) += mips/h264chroma_msa.o MSA-OBJS-$(CONFIG_H264PRED) += mips/h264pred_msa.o diff --git a/libavcodec/mips/h264_deblock_msa.c b/libavcodec/mips/h264_deblock_msa.c new file mode 100644 index 0000000..4fed55c --- /dev/null +++ b/libavcodec/mips/h264_deblock_msa.c @@ -0,0 +1,153 @@ +/* + * MIPS SIMD optimized H.264 deblocking code + * + * Copyright (c) 2020 Loongson Technology Corporation Limited + * Gu Xiwei + * + * This file is part of FFmpeg. + * + * FFmpeg is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * FFmpeg is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with FFmpeg; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include "libavcodec/bit_depth_template.c" +#include "h264dsp_mips.h" +#include "libavutil/mips/generic_macros_msa.h" +#include "libavcodec/mips/h264dsp_mips.h" + +#define h264_loop_filter_strength_iteration_msa(edges, step, mask_mv, dir, \ + d_idx, mask_dir) \ +do { \ + int b_idx = 0; \ + int step_x4 = step << 2; \ + int d_idx_12 = d_idx + 12; \ + int d_idx_52 = d_idx + 52; \ + int d_idx_x4 = d_idx << 2; \ + int d_idx_x4_48 = d_idx_x4 + 48; \ + int dir_x32 = dir * 32; \ + uint8_t *ref_t = (uint8_t*)ref; \ + uint8_t *mv_t = (uint8_t*)mv; \ + uint8_t *nnz_t = (uint8_t*)nnz; \ + uint8_t *bS_t = (uint8_t*)bS; \ + mask_mv <<= 3; \ + for (; b_idx < edges; b_idx += step) { \ + out &= mask_dir; \ + if (!(mask_mv & b_idx)) { \ + if (bidir) { \ + ref_2 = LD_SB(ref_t + d_idx_12); \ + ref_3 = LD_SB(ref_t + d_idx_52); \ + ref_0 = LD_SB(ref_t + 12); \ + ref_1 = LD_SB(ref_t + 52); \ + ref_2 = (v16i8)__msa_ilvr_w((v4i32)ref_3, (v4i32)ref_2); \ + ref_0 = (v16i8)__msa_ilvr_w((v4i32)ref_0, (v4i32)ref_0); \ + ref_1 = (v16i8)__msa_ilvr_w((v4i32)ref_1, (v4i32)ref_1); \ + ref_3 = (v16i8)__msa_shf_h((v8i16)ref_2, 0x4e); \ + ref_0 -= ref_2; \ + ref_1 -= ref_3; \ + ref_0 = (v16i8)__msa_or_v((v16u8)ref_0, (v16u8)ref_1); \ +\ + tmp_2 = LD_SH(mv_t + d_idx_x4_48); \ + tmp_3 = LD_SH(mv_t + 48); \ + tmp_4 = LD_SH(mv_t + 208); \ + tmp_5 = tmp_2 - tmp_3; \ + tmp_6 = tmp_2 - tmp_4; \ + SAT_SH2_SH(tmp_5, tmp_6, 7); \ + tmp_0 = __msa_pckev_b((v16i8)tmp_6, (v16i8)tmp_5); \ + tmp_0 += cnst_1; \ + tmp_0 = (v16i8)__msa_subs_u_b((v16u8)tmp_0, (v16u8)cnst_0);\ + tmp_0 = (v16i8)__msa_sat_s_h((v8i16)tmp_0, 7); \ + tmp_0 = __msa_pckev_b(tmp_0, tmp_0); \ + out = (v16i8)__msa_or_v((v16u8)ref_0, (v16u8)tmp_0); \ +\ + tmp_2 = LD_SH(mv_t + 208 + d_idx_x4); \ + tmp_5 = tmp_2 - tmp_3; \ + tmp_6 = tmp_2 - tmp_4; \ + SAT_SH2_SH(tmp_5, tmp_6, 7); \ + tmp_1 = __msa_pckev_b((v16i8)tmp_6, (v16i8)tmp_5); \ + tmp_1 += cnst_1; \ + tmp_1 = (v16i8)__msa_subs_u_b((v16u8)tmp_1, (v16u8)cnst_0); \ + tmp_1 = (v16i8)__msa_sat_s_h((v8i16)tmp_1, 7); \ + tmp_1 = __msa_pckev_b(tmp_1, tmp_1); \ +\ + tmp_1 = (v16i8)__msa_shf_h((v8i16)tmp_1, 0x4e); \ + out = (v16i8)__msa_or_v((v16u8)out, (v16u8)tmp_1); \ + tmp_0 = (v16i8)__msa_shf_h((v8i16)out, 0x4e); \ + out = (v16i8)__msa_min_u_b((v16u8)out, (v16u8)tmp_0); \ + } else { \ + ref_0 = LD_SB(ref_t + d_idx_12); \ + ref_3 = LD_SB(ref_t + 12); \ + tmp_2 = LD_SH(mv_t + d_idx_x4_48); \ + tmp_3 = LD_SH(mv_t + 48); \ + tmp_4 = tmp_3 - tmp_2; \ + tmp_1 = (v16i8)__msa_sat_s_h(tmp_4, 7); \ + tmp_1 = __msa_pckev_b(tmp_1, tmp_1); \ + tmp_1 += cnst_1; \ + out = (v16i8)__msa_subs_u_b((v16u8)tmp_1, (v16u8)cnst_0); \ + out = (v16i8)__msa_sat_s_h((v8i16)out, 7); \ + out = __msa_pckev_b(out, out); \ + ref_0 = ref_3 - ref_0; \ + out = (v16i8)__msa_or_v((v16u8)out, (v16u8)ref_0); \ + } \ + } \ + tmp_0 = LD_SB(nnz_t + 12); \ + tmp_1 = LD_SB(nnz_t + d_idx_12); \ + tmp_0 = (v16i8)__msa_or_v((v16u8)tmp_0, (v16u8)tmp_1); \ + tmp_0 = (v16i8)__msa_min_u_b((v16u8)tmp_0, (v16u8)cnst_2); \ + out = (v16i8)__msa_min_u_b((v16u8)out, (v16u8)cnst_2); \ + tmp_0 = (v16i8)((v8i16)tmp_0 << 1); \ + tmp_0 = (v16i8)__msa_max_u_b((v16u8)out, (v16u8)tmp_0); \ + tmp_0 = __msa_ilvr_b(zero, tmp_0); \ + ST_D1(tmp_0, 0, bS_t + dir_x32); \ + ref_t += step; \ + mv_t += step_x4; \ + nnz_t += step; \ + bS_t += step; \ + } \ +} while(0) + +void ff_h264_loop_filter_strength_msa(int16_t bS[2][4][4], uint8_t nnz[40], + int8_t ref[2][40], int16_t mv[2][40][2], + int bidir, int edges, int step, + int mask_mv0, int mask_mv1, int field) +{ + v16i8 out; + v16i8 ref_0, ref_1, ref_2, ref_3; + v16i8 tmp_0, tmp_1; + v8i16 tmp_2, tmp_3, tmp_4, tmp_5, tmp_6; + v16i8 cnst_0, cnst_1, cnst_2; + v16i8 zero = { 0 }; + v16i8 one = __msa_fill_b(0xff); + if (field) { + cnst_0 = (v16i8)__msa_fill_h(0x206); + cnst_1 = (v16i8)__msa_fill_h(0x103); + cnst_2 = (v16i8)__msa_fill_h(0x101); + } else { + cnst_0 = __msa_fill_b(0x6); + cnst_1 = __msa_fill_b(0x3); + cnst_2 = __msa_fill_b(0x1); + } + step <<= 3; + edges <<= 3; + + h264_loop_filter_strength_iteration_msa(edges, step, mask_mv1, 1, -8, zero); + h264_loop_filter_strength_iteration_msa(32, 8, mask_mv0, 0, -1, one); + + LD_SB2((int8_t*)bS, 16, tmp_0, tmp_1); + tmp_2 = (v8i16)__msa_ilvl_d((v2i64)tmp_0, (v2i64)tmp_0); + tmp_3 = (v8i16)__msa_ilvl_d((v2i64)tmp_1, (v2i64)tmp_1); + TRANSPOSE4x4_SH_SH(tmp_0, tmp_2, tmp_1, tmp_3, tmp_2, tmp_3, tmp_4, tmp_5); + tmp_0 = (v16i8)__msa_ilvr_d((v2i64)tmp_3, (v2i64)tmp_2); + tmp_1 = (v16i8)__msa_ilvr_d((v2i64)tmp_5, (v2i64)tmp_4); + ST_SB2(tmp_0, tmp_1, (int8_t*)bS, 16); +} diff --git a/libavcodec/mips/h264dsp_init_mips.c b/libavcodec/mips/h264dsp_init_mips.c index 9cd05e0..f822c38 100644 --- a/libavcodec/mips/h264dsp_init_mips.c +++ b/libavcodec/mips/h264dsp_init_mips.c @@ -78,6 +78,8 @@ av_cold void ff_h264dsp_init_mips(H264DSPContext *c, const int bit_depth, } if (have_msa(cpu_flags)) { + if (chroma_format_idc <= 1) + c->h264_loop_filter_strength = ff_h264_loop_filter_strength_msa; if (bit_depth == 8) { c->h264_v_loop_filter_luma = ff_h264_v_lpf_luma_inter_msa; c->h264_h_loop_filter_luma = ff_h264_h_lpf_luma_inter_msa; diff --git a/libavcodec/mips/h264dsp_mips.h b/libavcodec/mips/h264dsp_mips.h index 35e16c4..5847ef3 100644 --- a/libavcodec/mips/h264dsp_mips.h +++ b/libavcodec/mips/h264dsp_mips.h @@ -319,6 +319,10 @@ void ff_vp8_pred8x8_129_dc_8_msa(uint8_t *src, ptrdiff_t stride); void ff_vp8_pred16x16_127_dc_8_msa(uint8_t *src, ptrdiff_t stride); void ff_vp8_pred16x16_129_dc_8_msa(uint8_t *src, ptrdiff_t stride); +void ff_h264_loop_filter_strength_msa(int16_t bS[2][4][4], uint8_t nnz[40], + int8_t ref[2][40], int16_t mv[2][40][2], int bidir, int edges, + int step, int mask_mv0, int mask_mv1, int field); + void ff_h264_add_pixels4_8_mmi(uint8_t *_dst, int16_t *_src, int stride); void ff_h264_idct_add_8_mmi(uint8_t *dst, int16_t *block, int stride); void ff_h264_idct8_add_8_mmi(uint8_t *dst, int16_t *block, int stride); From patchwork Tue Mar 30 12:51:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shiyou Yin X-Patchwork-Id: 26664 Return-Path: X-Original-To: patchwork@ffaux-bg.ffmpeg.org Delivered-To: patchwork@ffaux-bg.ffmpeg.org Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org [79.124.17.100]) by ffaux.localdomain (Postfix) with ESMTP id 4223E44BD83 for ; Tue, 30 Mar 2021 15:52:17 +0300 (EEST) Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 1F66C689BC9; Tue, 30 Mar 2021 15:52:17 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 9C6CF68973D for ; Tue, 30 Mar 2021 15:52:08 +0300 (EEST) Received: from localhost (unknown [36.33.26.144]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9CxGcr2HmNgBGQCAA--.5726S3; Tue, 30 Mar 2021 20:52:06 +0800 (CST) From: Shiyou Yin To: ffmpeg-devel@ffmpeg.org Date: Tue, 30 Mar 2021 20:51:54 +0800 Message-Id: <1617108715-24232-5-git-send-email-yinshiyou-hf@loongson.cn> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1617108715-24232-1-git-send-email-yinshiyou-hf@loongson.cn> References: <1617108715-24232-1-git-send-email-yinshiyou-hf@loongson.cn> X-CM-TRANSID: AQAAf9CxGcr2HmNgBGQCAA--.5726S3 X-Coremail-Antispam: 1UD129KBjvAXoWfJF4rKFyrtw48Ww4ruF48JFb_yoW8XFWxKo WUKF9xZr1UWrn7ZFyft34fJF1v9FyUJ3s7JFW8Xr17GayYvryDCa9293yS9ryIqrZ3Aa4D X347Ww47tr1ayas5n29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUY57AC8VAFwI0_Jr0_Gr1l1xkIjI8I6I8E6xAIw20EY4v20xva j40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxSw2 x7M28EF7xvwVC0I7IYx2IY67AKxVW5JVW7JwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVWx JVW8Jr1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_Gc CE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E 2Ix0cI8IcVAFwI0_Jw0_WrylYx0Ex4A2jsIE14v26F4j6r4UJwAm72CE4IkC6x0Yz7v_Jr 0_Gr1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7MxkIecxEwVAFwVW5 JwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r 1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jrv_JF1lIxkGc2Ij 64vIr41lIxAIcVC0I7IYx2IY67AKxVW8JVW5JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Gr 0_Cr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF 0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x0JUDucNUUUUU= X-CM-SenderInfo: p1lq2x5l1r3gtki6z05rqj20fqof0/ Subject: [FFmpeg-devel] [PATCH v3 4/5] avcodec/mips: Refine ff_h264_h_lpf_luma_inter_msa X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Cc: gxw MIME-Version: 1.0 Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" From: gxw Using mask to avoid judgment, H264 4K decoding speed improved about 0.1fps tested on 3A4000 Signed-off-by: Shiyou Yin --- libavcodec/mips/h264dsp_msa.c | 465 ++++++++++++++++-------------------------- 1 file changed, 171 insertions(+), 294 deletions(-) diff --git a/libavcodec/mips/h264dsp_msa.c b/libavcodec/mips/h264dsp_msa.c index a8c3f3c..9d815f8 100644 --- a/libavcodec/mips/h264dsp_msa.c +++ b/libavcodec/mips/h264dsp_msa.c @@ -1284,284 +1284,160 @@ static void avc_loopfilter_cb_or_cr_intra_edge_ver_msa(uint8_t *data_cb_or_cr, } } -static void avc_loopfilter_luma_inter_edge_ver_msa(uint8_t *data, - uint8_t bs0, uint8_t bs1, - uint8_t bs2, uint8_t bs3, - uint8_t tc0, uint8_t tc1, - uint8_t tc2, uint8_t tc3, - uint8_t alpha_in, - uint8_t beta_in, - ptrdiff_t img_width) +static void avc_loopfilter_luma_inter_edge_ver_msa(uint8_t* pPix, uint32_t iStride, + uint8_t iAlpha, uint8_t iBeta, + uint8_t* pTc) { - v16u8 tmp_vec, bs = { 0 }; - - tmp_vec = (v16u8) __msa_fill_b(bs0); - bs = (v16u8) __msa_insve_w((v4i32) bs, 0, (v4i32) tmp_vec); - tmp_vec = (v16u8) __msa_fill_b(bs1); - bs = (v16u8) __msa_insve_w((v4i32) bs, 1, (v4i32) tmp_vec); - tmp_vec = (v16u8) __msa_fill_b(bs2); - bs = (v16u8) __msa_insve_w((v4i32) bs, 2, (v4i32) tmp_vec); - tmp_vec = (v16u8) __msa_fill_b(bs3); - bs = (v16u8) __msa_insve_w((v4i32) bs, 3, (v4i32) tmp_vec); - - if (!__msa_test_bz_v(bs)) { - uint8_t *src = data - 4; - v16u8 p3_org, p2_org, p1_org, p0_org, q0_org, q1_org, q2_org, q3_org; - v16u8 p0_asub_q0, p1_asub_p0, q1_asub_q0, alpha, beta; - v16u8 is_less_than, is_less_than_beta, is_less_than_alpha; - v16u8 is_bs_greater_than0; - v16u8 tc = { 0 }; - v16i8 zero = { 0 }; - - tmp_vec = (v16u8) __msa_fill_b(tc0); - tc = (v16u8) __msa_insve_w((v4i32) tc, 0, (v4i32) tmp_vec); - tmp_vec = (v16u8) __msa_fill_b(tc1); - tc = (v16u8) __msa_insve_w((v4i32) tc, 1, (v4i32) tmp_vec); - tmp_vec = (v16u8) __msa_fill_b(tc2); - tc = (v16u8) __msa_insve_w((v4i32) tc, 2, (v4i32) tmp_vec); - tmp_vec = (v16u8) __msa_fill_b(tc3); - tc = (v16u8) __msa_insve_w((v4i32) tc, 3, (v4i32) tmp_vec); - - is_bs_greater_than0 = (zero < bs); - - { - v16u8 row0, row1, row2, row3, row4, row5, row6, row7; - v16u8 row8, row9, row10, row11, row12, row13, row14, row15; - - LD_UB8(src, img_width, - row0, row1, row2, row3, row4, row5, row6, row7); - src += (8 * img_width); - LD_UB8(src, img_width, - row8, row9, row10, row11, row12, row13, row14, row15); - - TRANSPOSE16x8_UB_UB(row0, row1, row2, row3, row4, row5, row6, row7, - row8, row9, row10, row11, - row12, row13, row14, row15, - p3_org, p2_org, p1_org, p0_org, - q0_org, q1_org, q2_org, q3_org); - } - - p0_asub_q0 = __msa_asub_u_b(p0_org, q0_org); - p1_asub_p0 = __msa_asub_u_b(p1_org, p0_org); - q1_asub_q0 = __msa_asub_u_b(q1_org, q0_org); - - alpha = (v16u8) __msa_fill_b(alpha_in); - beta = (v16u8) __msa_fill_b(beta_in); - - is_less_than_alpha = (p0_asub_q0 < alpha); - is_less_than_beta = (p1_asub_p0 < beta); - is_less_than = is_less_than_beta & is_less_than_alpha; - is_less_than_beta = (q1_asub_q0 < beta); - is_less_than = is_less_than_beta & is_less_than; - is_less_than = is_less_than & is_bs_greater_than0; - - if (!__msa_test_bz_v(is_less_than)) { - v16i8 negate_tc, sign_negate_tc; - v16u8 p0, q0, p2_asub_p0, q2_asub_q0; - v8i16 tc_r, tc_l, negate_tc_r, i16_negatetc_l; - v8i16 p1_org_r, p0_org_r, q0_org_r, q1_org_r; - v8i16 p1_org_l, p0_org_l, q0_org_l, q1_org_l; - v8i16 p0_r, q0_r, p0_l, q0_l; - - negate_tc = zero - (v16i8) tc; - sign_negate_tc = __msa_clti_s_b(negate_tc, 0); - - ILVRL_B2_SH(sign_negate_tc, negate_tc, negate_tc_r, i16_negatetc_l); - - UNPCK_UB_SH(tc, tc_r, tc_l); - UNPCK_UB_SH(p1_org, p1_org_r, p1_org_l); - UNPCK_UB_SH(p0_org, p0_org_r, p0_org_l); - UNPCK_UB_SH(q0_org, q0_org_r, q0_org_l); - - p2_asub_p0 = __msa_asub_u_b(p2_org, p0_org); - is_less_than_beta = (p2_asub_p0 < beta); - is_less_than_beta = is_less_than_beta & is_less_than; - - if (!__msa_test_bz_v(is_less_than_beta)) { - v16u8 p1; - v8i16 p1_r = { 0 }; - v8i16 p1_l = { 0 }; - v8i16 p2_org_r = (v8i16) __msa_ilvr_b(zero, (v16i8) p2_org); - v8i16 p2_org_l = (v8i16) __msa_ilvl_b(zero, (v16i8) p2_org); - - AVC_LPF_P1_OR_Q1(p0_org_r, q0_org_r, p1_org_r, p2_org_r, - negate_tc_r, tc_r, p1_r); - AVC_LPF_P1_OR_Q1(p0_org_l, q0_org_l, p1_org_l, p2_org_l, - i16_negatetc_l, tc_l, p1_l); - - p1 = (v16u8) __msa_pckev_b((v16i8) p1_l, (v16i8) p1_r); - p1_org = __msa_bmnz_v(p1_org, p1, is_less_than_beta); - - is_less_than_beta = __msa_andi_b(is_less_than_beta, 1); - tc = tc + is_less_than_beta; - } - - q2_asub_q0 = __msa_asub_u_b(q2_org, q0_org); - is_less_than_beta = (q2_asub_q0 < beta); - is_less_than_beta = is_less_than_beta & is_less_than; - - q1_org_r = (v8i16) __msa_ilvr_b(zero, (v16i8) q1_org); - q1_org_l = (v8i16) __msa_ilvl_b(zero, (v16i8) q1_org); - - if (!__msa_test_bz_v(is_less_than_beta)) { - v16u8 q1; - v8i16 q1_r = { 0 }; - v8i16 q1_l = { 0 }; - v8i16 q2_org_r = (v8i16) __msa_ilvr_b(zero, (v16i8) q2_org); - v8i16 q2_org_l = (v8i16) __msa_ilvl_b(zero, (v16i8) q2_org); - - AVC_LPF_P1_OR_Q1(p0_org_r, q0_org_r, q1_org_r, q2_org_r, - negate_tc_r, tc_r, q1_r); - AVC_LPF_P1_OR_Q1(p0_org_l, q0_org_l, q1_org_l, q2_org_l, - i16_negatetc_l, tc_l, q1_l); - - q1 = (v16u8) __msa_pckev_b((v16i8) q1_l, (v16i8) q1_r); - q1_org = __msa_bmnz_v(q1_org, q1, is_less_than_beta); - - is_less_than_beta = __msa_andi_b(is_less_than_beta, 1); - tc = tc + is_less_than_beta; - } - - { - v8i16 threshold_r, negate_thresh_r; - v8i16 threshold_l, negate_thresh_l; - v16i8 negate_thresh, sign_negate_thresh; - - negate_thresh = zero - (v16i8) tc; - sign_negate_thresh = __msa_clti_s_b(negate_thresh, 0); - - ILVR_B2_SH(zero, tc, sign_negate_thresh, negate_thresh, - threshold_r, negate_thresh_r); - - AVC_LPF_P0Q0(q0_org_r, p0_org_r, p1_org_r, q1_org_r, - negate_thresh_r, threshold_r, p0_r, q0_r); - - threshold_l = (v8i16) __msa_ilvl_b(zero, (v16i8) tc); - negate_thresh_l = (v8i16) __msa_ilvl_b(sign_negate_thresh, - negate_thresh); - - AVC_LPF_P0Q0(q0_org_l, p0_org_l, p1_org_l, q1_org_l, - negate_thresh_l, threshold_l, p0_l, q0_l); - } - - PCKEV_B2_UB(p0_l, p0_r, q0_l, q0_r, p0, q0); - - p0_org = __msa_bmnz_v(p0_org, p0, is_less_than); - q0_org = __msa_bmnz_v(q0_org, q0, is_less_than); - - { - v16i8 tp0, tp1, tp2, tp3; - v8i16 tmp2, tmp5; - v4i32 tmp3, tmp4, tmp6, tmp7; - uint32_t out0, out2; - uint16_t out1, out3; - - src = data - 3; - - ILVRL_B2_SB(p1_org, p2_org, tp0, tp2); - ILVRL_B2_SB(q0_org, p0_org, tp1, tp3); - ILVRL_B2_SH(q2_org, q1_org, tmp2, tmp5); - - ILVRL_H2_SW(tp1, tp0, tmp3, tmp4); - ILVRL_H2_SW(tp3, tp2, tmp6, tmp7); - - out0 = __msa_copy_u_w(tmp3, 0); - out1 = __msa_copy_u_h(tmp2, 0); - out2 = __msa_copy_u_w(tmp3, 1); - out3 = __msa_copy_u_h(tmp2, 1); - - SW(out0, src); - SH(out1, (src + 4)); - src += img_width; - SW(out2, src); - SH(out3, (src + 4)); - - out0 = __msa_copy_u_w(tmp3, 2); - out1 = __msa_copy_u_h(tmp2, 2); - out2 = __msa_copy_u_w(tmp3, 3); - out3 = __msa_copy_u_h(tmp2, 3); - - src += img_width; - SW(out0, src); - SH(out1, (src + 4)); - src += img_width; - SW(out2, src); - SH(out3, (src + 4)); - - out0 = __msa_copy_u_w(tmp4, 0); - out1 = __msa_copy_u_h(tmp2, 4); - out2 = __msa_copy_u_w(tmp4, 1); - out3 = __msa_copy_u_h(tmp2, 5); - - src += img_width; - SW(out0, src); - SH(out1, (src + 4)); - src += img_width; - SW(out2, src); - SH(out3, (src + 4)); - - out0 = __msa_copy_u_w(tmp4, 2); - out1 = __msa_copy_u_h(tmp2, 6); - out2 = __msa_copy_u_w(tmp4, 3); - out3 = __msa_copy_u_h(tmp2, 7); - - src += img_width; - SW(out0, src); - SH(out1, (src + 4)); - src += img_width; - SW(out2, src); - SH(out3, (src + 4)); - - out0 = __msa_copy_u_w(tmp6, 0); - out1 = __msa_copy_u_h(tmp5, 0); - out2 = __msa_copy_u_w(tmp6, 1); - out3 = __msa_copy_u_h(tmp5, 1); - - src += img_width; - SW(out0, src); - SH(out1, (src + 4)); - src += img_width; - SW(out2, src); - SH(out3, (src + 4)); - - out0 = __msa_copy_u_w(tmp6, 2); - out1 = __msa_copy_u_h(tmp5, 2); - out2 = __msa_copy_u_w(tmp6, 3); - out3 = __msa_copy_u_h(tmp5, 3); - - src += img_width; - SW(out0, src); - SH(out1, (src + 4)); - src += img_width; - SW(out2, src); - SH(out3, (src + 4)); - - out0 = __msa_copy_u_w(tmp7, 0); - out1 = __msa_copy_u_h(tmp5, 4); - out2 = __msa_copy_u_w(tmp7, 1); - out3 = __msa_copy_u_h(tmp5, 5); - - src += img_width; - SW(out0, src); - SH(out1, (src + 4)); - src += img_width; - SW(out2, src); - SH(out3, (src + 4)); - - out0 = __msa_copy_u_w(tmp7, 2); - out1 = __msa_copy_u_h(tmp5, 6); - out2 = __msa_copy_u_w(tmp7, 3); - out3 = __msa_copy_u_h(tmp5, 7); - - src += img_width; - SW(out0, src); - SH(out1, (src + 4)); - src += img_width; - SW(out2, src); - SH(out3, (src + 4)); - } - } - } + v16u8 p0, p1, p2, q0, q1, q2; + v16i8 iTc, negiTc, negTc, flags, f; + v8i16 p0_l, p0_r, p1_l, p1_r, p2_l, p2_r, q0_l, q0_r, q1_l, q1_r, q2_l, q2_r; + v8i16 tc_l, tc_r, negTc_l, negTc_r; + v8i16 iTc_l, iTc_r, negiTc_l, negiTc_r; + // Use for temporary variable + v8i16 t0, t1, t2, t3; + v16u8 alpha, beta; + v16u8 bDetaP0Q0, bDetaP1P0, bDetaQ1Q0, bDetaP2P0, bDetaQ2Q0; + v16i8 const_1_b = __msa_ldi_b(1); + v8i16 const_1_h = __msa_ldi_h(1); + v8i16 const_4_h = __msa_ldi_h(4); + v8i16 const_not_255_h = __msa_ldi_h(~255); + v16i8 zero = { 0 }; + v16i8 tc = { pTc[0 >> 2], pTc[1 >> 2], pTc[2 >> 2], pTc[3 >> 2], + pTc[4 >> 2], pTc[5 >> 2], pTc[6 >> 2], pTc[7 >> 2], + pTc[8 >> 2], pTc[9 >> 2], pTc[10 >> 2], pTc[11 >> 2], + pTc[12 >> 2], pTc[13 >> 2], pTc[14 >> 2], pTc[15 >> 2] }; + negTc = zero - tc; + iTc = tc; + + // Load data from pPix + LD_SH8(pPix - 3, iStride, t0, t1, t2, t3, q1_l, q1_r, q2_l, q2_r); + LD_SH8(pPix + 8 * iStride - 3, iStride, p0_l, p0_r, p1_l, p1_r, + p2_l, p2_r, q0_l, q0_r); + TRANSPOSE16x8_UB_UB(t0, t1, t2, t3, q1_l, q1_r, q2_l, q2_r, + p0_l, p0_r, p1_l, p1_r, p2_l, p2_r, q0_l, q0_r, + p2, p1, p0, q0, q1, q2, alpha, beta); + + alpha = (v16u8)__msa_fill_b(iAlpha); + beta = (v16u8)__msa_fill_b(iBeta); + + bDetaP0Q0 = __msa_asub_u_b(p0, q0); + bDetaP1P0 = __msa_asub_u_b(p1, p0); + bDetaQ1Q0 = __msa_asub_u_b(q1, q0); + bDetaP2P0 = __msa_asub_u_b(p2, p0); + bDetaQ2Q0 = __msa_asub_u_b(q2, q0); + bDetaP0Q0 = (v16u8)__msa_clt_u_b(bDetaP0Q0, alpha); + bDetaP1P0 = (v16u8)__msa_clt_u_b(bDetaP1P0, beta); + bDetaQ1Q0 = (v16u8)__msa_clt_u_b(bDetaQ1Q0, beta); + bDetaP2P0 = (v16u8)__msa_clt_u_b(bDetaP2P0, beta); + bDetaQ2Q0 = (v16u8)__msa_clt_u_b(bDetaQ2Q0, beta); + + // Unsigned extend p0, p1, p2, q0, q1, q2 from 8 bits to 16 bits + ILVRL_B2_SH(zero, p0, p0_r, p0_l); + ILVRL_B2_SH(zero, p1, p1_r, p1_l); + ILVRL_B2_SH(zero, p2, p2_r, p2_l); + ILVRL_B2_SH(zero, q0, q0_r, q0_l); + ILVRL_B2_SH(zero, q1, q1_r, q1_l); + ILVRL_B2_SH(zero, q2, q2_r, q2_l); + // Signed extend tc, negTc from 8 bits to 16 bits + flags = __msa_clt_s_b(tc, zero); + ILVRL_B2(v8i16, flags, tc, tc_r, tc_l); + flags = __msa_clt_s_b(negTc, zero); + ILVRL_B2(v8i16, flags, negTc, negTc_r, negTc_l); + + f = (v16i8)bDetaP0Q0 & (v16i8)bDetaP1P0 & (v16i8)bDetaQ1Q0; + flags = f & (v16i8)bDetaP2P0; + flags = __msa_ceq_b(flags, zero); + iTc += ((~flags) & const_1_b); + flags = f & (v16i8)bDetaQ2Q0; + flags = __msa_ceq_b(flags, zero); + iTc += ((~flags) & const_1_b); + negiTc = zero - iTc; + // Signed extend iTc, negiTc from 8 bits to 16 bits + flags = __msa_clt_s_b(iTc, zero); + ILVRL_B2(v8i16, flags, iTc, iTc_r, iTc_l); + flags = __msa_clt_s_b(negiTc, zero); + ILVRL_B2(v8i16, flags, negiTc, negiTc_r, negiTc_l); + + // Calculate the left part + // p1 + t0 = (p2_l + ((p0_l + q0_l + const_1_h) >> 1) - (p1_l << 1)) >> 1; + t0 = __msa_max_s_h(negTc_l, t0); + t0 = __msa_min_s_h(tc_l, t0); + t1 = p1_l + t0; + // q1 + t0 = (q2_l + ((p0_l + q0_l + const_1_h) >> 1) - (q1_l << 1)) >> 1; + t0 = __msa_max_s_h(negTc_l, t0); + t0 = __msa_min_s_h(tc_l, t0); + t2 = q1_l + t0; + // iDeta + t0 = (((q0_l - p0_l) << 2) + (p1_l - q1_l) + const_4_h) >> 3; + t0 = __msa_max_s_h(negiTc_l, t0); + t0 = __msa_min_s_h(iTc_l, t0); + p1_l = t1; + q1_l = t2; + // p0 + t1 = p0_l + t0; + t2 = t1 & const_not_255_h; + t3 = __msa_cle_s_h((v8i16)zero, t1); + flags = (v16i8)__msa_ceq_h(t2, (v8i16)zero); + p0_l = (t1 & (v8i16)flags) + (t3 & (v8i16)(~flags)); + // q0 + t1 = q0_l - t0; + t2 = t1 & const_not_255_h; + t3 = __msa_cle_s_h((v8i16)zero, t1); + flags = (v16i8)__msa_ceq_h(t2, (v8i16)zero); + q0_l = (t1 & (v8i16)flags) + (t3 & (v8i16)(~flags)); + + // Calculate the right part + // p1 + t0 = (p2_r + ((p0_r + q0_r + const_1_h) >> 1) - (p1_r << 1)) >> 1; + t0 = __msa_max_s_h(negTc_r, t0); + t0 = __msa_min_s_h(tc_r, t0); + t1 = p1_r + t0; + // q1 + t0 = (q2_r + ((p0_r + q0_r + const_1_h) >> 1) - (q1_r << 1)) >> 1; + t0 = __msa_max_s_h(negTc_r, t0); + t0 = __msa_min_s_h(tc_r, t0); + t2 = q1_r + t0; + // iDeta + t0 = (((q0_r - p0_r) << 2) + (p1_r - q1_r) + const_4_h) >> 3; + t0 = __msa_max_s_h(negiTc_r, t0); + t0 = __msa_min_s_h(iTc_r, t0); + p1_r = t1; + q1_r = t2; + // p0 + t1 = p0_r + t0; + t2 = t1 & const_not_255_h; + t3 = __msa_cle_s_h((v8i16)zero, t1); + flags = (v16i8)__msa_ceq_h(t2, (v8i16)zero); + p0_r = (t1 & (v8i16)flags) + (t3 & (v8i16)(~flags)); + // q0 + t1 = q0_r - t0; + t2 = t1 & const_not_255_h; + t3 = __msa_cle_s_h((v8i16)zero, t1); + flags = (v16i8)__msa_ceq_h(t2, (v8i16)zero); + q0_r = (t1 & (v8i16)flags) + (t3 & (v8i16)(~flags)); + + // Combined left and right + PCKEV_B4(v8i16, p1_l, p1_r, p0_l, p0_r, q0_l, q0_r, q1_l, q1_r, + t0, t1, t2, t3); + flags = (v16i8)__msa_cle_s_b(zero, tc); + flags &= f; + p0 = (v16u8)(((v16i8)t1 & flags) + (p0 & (~flags))); + q0 = (v16u8)(((v16i8)t2 & flags) + (q0 & (~flags))); + // Using t1, t2 as temporary flags + t1 = (v8i16)(flags & (~(__msa_ceq_b((v16i8)bDetaP2P0, zero)))); + p1 = (v16u8)(t0 & t1) + (p1 & (v16u8)(~t1)); + t2 = (v8i16)(flags & (~(__msa_ceq_b((v16i8)bDetaQ2Q0, zero)))); + q1 = (v16u8)(t3 & t2) + (q1 & (v16u8)(~t2)); + + ILVRL_B2_SH(p0, p1, t0, t1); + ILVRL_B2_SH(q1, q0, t2, t3); + ILVRL_H2_UB(t2, t0, p1, p0); + ILVRL_H2_UB(t3, t1, q0, q1); + // Store data to pPix + ST_W8(p1, p0, 0, 1, 2, 3, 0, 1, 2, 3, pPix - 2, iStride); + ST_W8(q0, q1, 0, 1, 2, 3, 0, 1, 2, 3, pPix + 8 * iStride - 2, iStride); } static void avc_loopfilter_luma_inter_edge_hor_msa(uint8_t *data, @@ -2180,23 +2056,24 @@ static void avc_h_loop_filter_chroma422_mbaff_msa(uint8_t *src, void ff_h264_h_lpf_luma_inter_msa(uint8_t *data, ptrdiff_t img_width, int alpha, int beta, int8_t *tc) { - uint8_t bs0 = 1; - uint8_t bs1 = 1; - uint8_t bs2 = 1; - uint8_t bs3 = 1; - - if (tc[0] < 0) - bs0 = 0; - if (tc[1] < 0) - bs1 = 0; - if (tc[2] < 0) - bs2 = 0; - if (tc[3] < 0) - bs3 = 0; - - avc_loopfilter_luma_inter_edge_ver_msa(data, bs0, bs1, bs2, bs3, - tc[0], tc[1], tc[2], tc[3], - alpha, beta, img_width); +// uint8_t bs0 = 1; +// uint8_t bs1 = 1; +// uint8_t bs2 = 1; +// uint8_t bs3 = 1; +// +// if (tc[0] < 0) +// bs0 = 0; +// if (tc[1] < 0) +// bs1 = 0; +// if (tc[2] < 0) +// bs2 = 0; +// if (tc[3] < 0) +// bs3 = 0; +// +// avc_loopfilter_luma_inter_edge_ver_msa(data, bs0, bs1, bs2, bs3, +// tc[0], tc[1], tc[2], tc[3], +// alpha, beta, img_width); + avc_loopfilter_luma_inter_edge_ver_msa(data, img_width, alpha, beta, tc); } void ff_h264_v_lpf_luma_inter_msa(uint8_t *data, ptrdiff_t img_width, From patchwork Tue Mar 30 12:51:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shiyou Yin X-Patchwork-Id: 26665 Return-Path: X-Original-To: patchwork@ffaux-bg.ffmpeg.org Delivered-To: patchwork@ffaux-bg.ffmpeg.org Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org [79.124.17.100]) by ffaux.localdomain (Postfix) with ESMTP id 60C4544BD83 for ; Tue, 30 Mar 2021 15:52:19 +0300 (EEST) Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 4935B689F3A; Tue, 30 Mar 2021 15:52:19 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id A65F2688152 for ; Tue, 30 Mar 2021 15:52:09 +0300 (EEST) Received: from localhost (unknown [36.33.26.144]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9Ax7cj3HmNgBWQCAA--.2312S3; Tue, 30 Mar 2021 20:52:07 +0800 (CST) From: Shiyou Yin To: ffmpeg-devel@ffmpeg.org Date: Tue, 30 Mar 2021 20:51:55 +0800 Message-Id: <1617108715-24232-6-git-send-email-yinshiyou-hf@loongson.cn> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1617108715-24232-1-git-send-email-yinshiyou-hf@loongson.cn> References: <1617108715-24232-1-git-send-email-yinshiyou-hf@loongson.cn> X-CM-TRANSID: AQAAf9Ax7cj3HmNgBWQCAA--.2312S3 X-Coremail-Antispam: 1UD129KBjvJXoW3AFy8CFWxXr4UuF4xXr4UXFb_yoW7Xr18pr 4fuaySgryUXFyj9wnrAwn5Cw15tr4kGFW2yFWUGw1fW3s8Ca47tr9aqr4fZFyUWFWrAF1x Was7Kw17GrsxAr7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUkFb7Iv0xC_Kw4lb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rw A2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xII jxv20xvEc7CjxVAFwI0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I 8E87Iv6xkF7I0E14v26rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI 64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1q6rW5McIj6I8E87Iv67AKxVWxJVW8Jr 1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0Y48IcxkI7VAKI48JMxkIecxEwVAFwVW5JwCF04k2 0xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI 8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jr0_JrylIxkGc2Ij64vIr41l IxAIcVC0I7IYx2IY67AKxVW8JVW5JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1lIx AIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4A2 jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07bOGQgUUUUU= X-CM-SenderInfo: p1lq2x5l1r3gtki6z05rqj20fqof0/ Subject: [FFmpeg-devel] [PATCH v3 5/5] mips: Fix potential illegal instruction error. X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches MIME-Version: 1.0 Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" MSA2 optimizations are attached to MSA macros in generic_macros_msa.h. It's difficult to do runtime check for them. Remove this part of code can make it more robust. H264 1080p decoding: 5.13x==>5.12x. --- configure | 7 +------ libavutil/mips/generic_macros_msa.h | 37 ------------------------------------- 2 files changed, 1 insertion(+), 43 deletions(-) diff --git a/configure b/configure index d7a3f50..7b05612 100755 --- a/configure +++ b/configure @@ -451,7 +451,6 @@ Optimization options (experts only): --disable-mipsdsp disable MIPS DSP ASE R1 optimizations --disable-mipsdspr2 disable MIPS DSP ASE R2 optimizations --disable-msa disable MSA optimizations - --disable-msa2 disable MSA2 optimizations --disable-mipsfpu disable floating point MIPS optimizations --disable-mmi disable Loongson SIMD optimizations --disable-fast-unaligned consider unaligned accesses slow @@ -2025,7 +2024,6 @@ ARCH_EXT_LIST_MIPS=" mipsdsp mipsdspr2 msa - msa2 " ARCH_EXT_LIST_LOONGSON=" @@ -2564,7 +2562,6 @@ mipsdsp_deps="mips" mipsdspr2_deps="mips" mmi_deps_any="loongson2 loongson3" msa_deps="mipsfpu" -msa2_deps="msa" cpunop_deps="i686" x86_64_select="i686" @@ -5907,9 +5904,8 @@ elif enabled mips; then enabled mipsdsp && check_inline_asm_flags mipsdsp '"addu.qb $t0, $t1, $t2"' '-mdsp' enabled mipsdspr2 && check_inline_asm_flags mipsdspr2 '"absq_s.qb $t0, $t1"' '-mdspr2' - # MSA and MSA2 can be detected at runtime so we supply extra flags here + # MSA can be detected at runtime so we supply extra flags here enabled mipsfpu && enabled msa && check_inline_asm msa '"addvi.b $w0, $w1, 1"' '-mmsa' && append MSAFLAGS '-mmsa' - enabled msa && enabled msa2 && check_inline_asm msa2 '"nxbits.any.b $w0, $w0"' '-mmsa2' && append MSAFLAGS '-mmsa2' # loongson2 have no switch cflag so we can only probe toolchain ability enabled loongson2 && check_inline_asm loongson2 '"dmult.g $8, $9, $10"' && disable loongson3 @@ -7340,7 +7336,6 @@ if enabled mips; then echo "MIPS DSP R1 enabled ${mipsdsp-no}" echo "MIPS DSP R2 enabled ${mipsdspr2-no}" echo "MIPS MSA enabled ${msa-no}" - echo "MIPS MSA2 enabled ${msa2-no}" echo "LOONGSON MMI enabled ${mmi-no}" fi if enabled ppc; then diff --git a/libavutil/mips/generic_macros_msa.h b/libavutil/mips/generic_macros_msa.h index bb25e9f..1486f72 100644 --- a/libavutil/mips/generic_macros_msa.h +++ b/libavutil/mips/generic_macros_msa.h @@ -25,10 +25,6 @@ #include #include -#if HAVE_MSA2 -#include -#endif - #define ALIGNMENT 16 #define ALLOC_ALIGNED(align) __attribute__ ((aligned((align) << 1))) @@ -1119,15 +1115,6 @@ unsigned absolute diff values, even-odd pairs are added together to generate 8 halfword results. */ -#if HAVE_MSA2 -#define SAD_UB2_UH(in0, in1, ref0, ref1) \ -( { \ - v8u16 sad_m = { 0 }; \ - sad_m += __builtin_msa2_sad_adj2_u_w2x_b((v16u8) in0, (v16u8) ref0); \ - sad_m += __builtin_msa2_sad_adj2_u_w2x_b((v16u8) in1, (v16u8) ref1); \ - sad_m; \ -} ) -#else #define SAD_UB2_UH(in0, in1, ref0, ref1) \ ( { \ v16u8 diff0_m, diff1_m; \ @@ -1141,7 +1128,6 @@ \ sad_m; \ } ) -#endif // #if HAVE_MSA2 /* Description : Insert specified word elements from input vectors to 1 destination vector @@ -2183,12 +2169,6 @@ extracted and interleaved with same vector 'in0' to generate 4 word elements keeping sign intact */ -#if HAVE_MSA2 -#define UNPCK_R_SH_SW(in, out) \ -{ \ - out = (v4i32) __builtin_msa2_w2x_lo_s_h((v8i16) in); \ -} -#else #define UNPCK_R_SH_SW(in, out) \ { \ v8i16 sign_m; \ @@ -2196,7 +2176,6 @@ sign_m = __msa_clti_s_h((v8i16) in, 0); \ out = (v4i32) __msa_ilvr_h(sign_m, (v8i16) in); \ } -#endif // #if HAVE_MSA2 /* Description : Sign extend byte elements from input vector and return halfword results in pair of vectors @@ -2209,13 +2188,6 @@ Then interleaved left with same vector 'in0' to generate 8 signed halfword elements in 'out1' */ -#if HAVE_MSA2 -#define UNPCK_SB_SH(in, out0, out1) \ -{ \ - out0 = (v4i32) __builtin_msa2_w2x_lo_s_b((v16i8) in); \ - out1 = (v4i32) __builtin_msa2_w2x_hi_s_b((v16i8) in); \ -} -#else #define UNPCK_SB_SH(in, out0, out1) \ { \ v16i8 tmp_m; \ @@ -2223,7 +2195,6 @@ tmp_m = __msa_clti_s_b((v16i8) in, 0); \ ILVRL_B2_SH(tmp_m, in, out0, out1); \ } -#endif // #if HAVE_MSA2 /* Description : Zero extend unsigned byte elements to halfword elements Arguments : Inputs - in (1 input unsigned byte vector) @@ -2250,13 +2221,6 @@ Then interleaved left with same vector 'in0' to generate 4 signed word elements in 'out1' */ -#if HAVE_MSA2 -#define UNPCK_SH_SW(in, out0, out1) \ -{ \ - out0 = (v4i32) __builtin_msa2_w2x_lo_s_h((v8i16) in); \ - out1 = (v4i32) __builtin_msa2_w2x_hi_s_h((v8i16) in); \ -} -#else #define UNPCK_SH_SW(in, out0, out1) \ { \ v8i16 tmp_m; \ @@ -2264,7 +2228,6 @@ tmp_m = __msa_clti_s_h((v8i16) in, 0); \ ILVRL_H2_SW(tmp_m, in, out0, out1); \ } -#endif // #if HAVE_MSA2 /* Description : Swap two variables Arguments : Inputs - in0, in1