From patchwork Mon Sep 5 17:05:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?R=C3=A9mi_Denis-Courmont?= X-Patchwork-Id: 37676 Delivered-To: ffmpegpatchwork2@gmail.com Received: by 2002:a05:6a20:139a:b0:8f:1db5:eae2 with SMTP id w26csp2755873pzh; Mon, 5 Sep 2022 10:06:13 -0700 (PDT) X-Google-Smtp-Source: AA6agR5rIbeWLeYeEAUPCACTmUl1GeRCzmsEKbrEDZtHYctUGNnrpzB75Ze01dre17gTchXbfMUO X-Received: by 2002:a17:907:2c78:b0:741:4b9b:8d40 with SMTP id ib24-20020a1709072c7800b007414b9b8d40mr29295801ejc.553.1662397572982; Mon, 05 Sep 2022 10:06:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1662397572; cv=none; d=google.com; s=arc-20160816; b=zbhwg8Syh9NcaVYqGL6DAbqVVWoud5o61AonpMne9/GL62Ees3ASGwe3XNyvPd1dVm LaCiQggqFgEH+INfpR/vHzMmkNNOmqTvozfP4CgmIMRQLpnGUpg/BEeGl6b4EZZOLLsZ mOO6sA6jY96jCge7CUcSfV0VIVZE8Hr8fszmexdOlWjCPfsBC3N3Bpfab/o1h6hz3dMm 1EtnHFsuWFPkBO7jkP3IsdJs6rgP23mSmxFjSUWwcZ0Po4YHuaBqOz1o5tlJMbRIuc3j lb9vfNO1JQQCtU388+xtUbkIbrxX37m5pCyUVtPN1H5awPvAVE4ZVZG317VtYYEc0Kuc YD6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:reply-to:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:subject:mime-version:message-id:date:to:from :delivered-to; bh=sFSwiWABfZ2FYKcUUXQIu2DsoJ3L8hf9Yj+Cp4KzWtc=; b=XNIy/E+EEJdjx3Rm/1i7+TxnD6+BoRhgLIGzjLTqExg9WHIjH54GkyP+cXYf/2EaBY jBVorucxU2VlMed8SJezUb6Ng7g5+aWX0ZJWxLcASmPuKB1SVmo0/Nghn8mH5i8SDgLV JAcG4k2jJQ6rVpRYkChOZmWSyJ2G5SKRFcjnxdqUZ8coHg1kH7xYF8Pr2/qUkrCLfe71 qjyWT68i8U6W6bZRyUlp4diBhVbqmCpFHOWJGEzIQrY3Zu1uw2lByj94X31mLeRJvoqf gwfbVtIiG05F/lKVobgjYAYvL6a0BYlbJvJH3/VpBKQlnKse9pm20AFT19Zmap6Rwsq/ mp4Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Return-Path: Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org. [79.124.17.100]) by mx.google.com with ESMTP id t21-20020a170906269500b00741550f828bsi7019985ejc.919.2022.09.05.10.06.11; Mon, 05 Sep 2022 10:06:12 -0700 (PDT) Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; Authentication-Results: mx.google.com; spf=pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) smtp.mailfrom=ffmpeg-devel-bounces@ffmpeg.org Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 3307F68B960; Mon, 5 Sep 2022 20:06:08 +0300 (EEST) X-Original-To: ffmpeg-devel@ffmpeg.org Delivered-To: ffmpeg-devel@ffmpeg.org Received: from ursule.remlab.net (unknown [51.75.19.47]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 1505468B889 for ; Mon, 5 Sep 2022 20:06:01 +0300 (EEST) Received: from basile.remlab.net (localhost [IPv6:::1]) by ursule.remlab.net (Postfix) with ESMTP id 0071EC0088 for ; Mon, 5 Sep 2022 20:05:59 +0300 (EEST) From: remi@remlab.net To: ffmpeg-devel@ffmpeg.org Date: Mon, 5 Sep 2022 20:05:59 +0300 Message-Id: <20220905170559.121015-1-remi@remlab.net> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCH] lavu/riscv: cycle counter for AV_READ_TIME X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" X-TUID: wDU+s8Ee/WVC From: RĂ©mi Denis-Courmont This uses the architected RISC-V 64-bit cycle counter from the RISC-V unprivileged instruction set. In 64-bit and 128-bit, this is a straightforward CSR read. In 32-bit mode, the 64-bit value is exposed as two CSRs, which cannot be read atomically, so a loop is necessary to detect and fix up the race condition where the bottom half wraps exactly between the two reads. --- Tested on VisionFive SBC courtesy of Shanghai StarFive Technology. --- libavutil/riscv/timer.h | 54 +++++++++++++++++++++++++++++++++++++++++ libavutil/timer.h | 2 ++ 2 files changed, 56 insertions(+) create mode 100644 libavutil/riscv/timer.h diff --git a/libavutil/riscv/timer.h b/libavutil/riscv/timer.h new file mode 100644 index 0000000000..02a4b3962e --- /dev/null +++ b/libavutil/riscv/timer.h @@ -0,0 +1,54 @@ +/* + * This file is part of FFmpeg. + * + * FFmpeg is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * FFmpeg is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with FFmpeg; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef AVUTIL_RISCV_TIMER_H +#define AVUTIL_RISCV_TIMER_H + +#include "config.h" + +#if HAVE_INLINE_ASM +#include + +static inline uint64_t rdcycle64(void) +{ +#if (__riscv_xlen >= 64) + uintptr_t cycles; + + __asm__ volatile ("rdcycle %0" : "=r"(cycles)); + +#else + uint64_t cycles; + uint32_t hi, lo, check; + + do { + __asm__ volatile ( + "rdcycleh %0\n" + "rdcycle %1\n" + "rdcycleh %2\n" : "=r" (hi), "=r" (lo), "=r" (check)); + } while (hi != check); + + cycles = (((uint64_t)hi) << 32) | lo; + +#endif + return cycles; +} + +#define AV_READ_TIME rdcycle64 + +#endif +#endif /* AVUTIL_RISCV_TIMER_H */ diff --git a/libavutil/timer.h b/libavutil/timer.h index 48e576739f..0b3460c682 100644 --- a/libavutil/timer.h +++ b/libavutil/timer.h @@ -55,6 +55,8 @@ # include "aarch64/timer.h" #elif ARCH_ARM # include "arm/timer.h" +#elif ARCH_RISCV +# include "riscv/timer.h" #elif ARCH_PPC # include "ppc/timer.h" #elif ARCH_X86