mbox series

[FFmpeg-devel,v4,0/4] MIPS MSA & MMI Runtime detection support

Message ID 20200608033004.2635-1-jiaxun.yang@flygoat.com
Headers show
Series MIPS MSA & MMI Runtime detection support | expand

Message

Jiaxun Yang June 8, 2020, 3:30 a.m. UTC 
This series adds MIPS MSA & MMI runtime detection support

Please review.

Thanks!

v2:
  - Add CPUCFG support.
  - Add "-mloongson-ext" to MMIFLAGS for Loongson-3 as well. (Loongson2F don't need this flag)

v3:
  - Address reveiew suggestions from Shiyou Yin and Weixi Gu.

v4:
  - Disable DSP for generic CPU

Jiaxun Yang (4):
  ffbuild: Refine MIPS handling
  libavutils: Add parse_r helper for MIPS
  libavutil: Detect MMI and MSA flags for MIPS
  libavcodec: Enable runtime detection for MIPS MMI & MSA

 configure                                   | 183 ++++++++++++--------
 ffbuild/common.mak                          |  10 +-
 libavcodec/mips/Makefile                    |   3 +-
 libavcodec/mips/blockdsp_init_mips.c        |  22 ++-
 libavcodec/mips/cabac.h                     |   2 +-
 libavcodec/mips/h263dsp_init_mips.c         |  12 +-
 libavcodec/mips/h264chroma_init_mips.c      |  22 ++-
 libavcodec/mips/h264dsp_init_mips.c         |  25 ++-
 libavcodec/mips/h264pred_init_mips.c        |  25 ++-
 libavcodec/mips/h264qpel_init_mips.c        |  22 ++-
 libavcodec/mips/hevcdsp_init_mips.c         |  24 ++-
 libavcodec/mips/hevcpred_init_mips.c        |  12 +-
 libavcodec/mips/hpeldsp_init_mips.c         |  22 ++-
 libavcodec/mips/idctdsp_init_mips.c         |  24 ++-
 libavcodec/mips/me_cmp_init_mips.c          |  12 +-
 libavcodec/mips/mpegvideo_init_mips.c       |  22 ++-
 libavcodec/mips/mpegvideoencdsp_init_mips.c |  13 +-
 libavcodec/mips/pixblockdsp_init_mips.c     |  25 ++-
 libavcodec/mips/qpeldsp_init_mips.c         |  12 +-
 libavcodec/mips/vc1dsp_init_mips.c          |  22 ++-
 libavcodec/mips/videodsp_init.c             |  12 +-
 libavcodec/mips/vp3dsp_init_mips.c          |  22 ++-
 libavcodec/mips/vp8dsp_init_mips.c          |  22 ++-
 libavcodec/mips/vp9dsp_init_mips.c          |  22 ++-
 libavcodec/mips/wmv2dsp_init_mips.c         |  12 +-
 libavcodec/mips/xvididct_init_mips.c        |  13 +-
 libavutil/cpu.c                             |  10 ++
 libavutil/cpu.h                             |   3 +
 libavutil/cpu_internal.h                    |   2 +
 libavutil/mips/Makefile                     |   2 +-
 libavutil/mips/asmdefs.h                    |  42 +++++
 libavutil/mips/cpu.c                        | 134 ++++++++++++++
 libavutil/mips/cpu.h                        |  28 +++
 libavutil/tests/cpu.c                       |   3 +
 tests/checkasm/checkasm.c                   |   3 +
 35 files changed, 658 insertions(+), 186 deletions(-)
 create mode 100644 libavutil/mips/cpu.c
 create mode 100644 libavutil/mips/cpu.h

Comments

Shiyou Yin June 8, 2020, 8:38 a.m. UTC | #1 
>-----Original Message-----
>From: ffmpeg-devel-bounces@ffmpeg.org [mailto:ffmpeg-devel-bounces@ffmpeg.org] On Behalf Of
>Jiaxun Yang
>Sent: Monday, June 8, 2020 11:30 AM
>To: ffmpeg-devel@ffmpeg.org
>Cc: yinshiyou@loongson.cn; Jiaxun Yang
>Subject: [FFmpeg-devel] [PATCH v4 2/4] libavutils: Add parse_r helper for MIPS
>
>That helper grab from kernel code can allow us to inline
>newer instructions (not implemented by the assembler) in
>a elegant manner.
>
>Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>---
> libavutil/mips/asmdefs.h | 42 ++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 42 insertions(+)
>
>diff --git a/libavutil/mips/asmdefs.h b/libavutil/mips/asmdefs.h
>index 748119918a..7e0e4cf575 100644
>--- a/libavutil/mips/asmdefs.h
>+++ b/libavutil/mips/asmdefs.h
>@@ -55,4 +55,46 @@
> # define PTR_SLL        "sll "
> #endif
>
>+/*
>+ * parse_r var, r - Helper assembler macro for parsing register names.
>+ *
>+ * This converts the register name in $n form provided in \r to the
>+ * corresponding register number, which is assigned to the variable \var. It is
>+ * needed to allow explicit encoding of instructions in inline assembly where
>+ * registers are chosen by the compiler in $n form, allowing us to avoid using
>+ * fixed register numbers.
>+ *
>+ * It also allows newer instructions (not implemented by the assembler) to be
>+ * transparently implemented using assembler macros, instead of needing separate
>+ * cases depending on toolchain support.
>+ *
>+ * Simple usage example:
>+ * __asm__ __volatile__("parse_r __rt, %0\n\t"
>+ *			".insn\n\t"
>+ *			"# di    %0\n\t"
>+ *			".word   (0x41606000 | (__rt << 16))"
>+ *			: "=r" (status);
>+ */
>+
>+/* Match an individual register number and assign to \var */
>+#define _IFC_REG(n)				\
>+	".ifc	\\r, $" #n "\n\t"		\
>+	"\\var	= " #n "\n\t"			\
>+	".endif\n\t"
>+
>+__asm__(".macro	parse_r var r\n\t"
>+	"\\var	= -1\n\t"
>+	_IFC_REG(0)  _IFC_REG(1)  _IFC_REG(2)  _IFC_REG(3)
>+	_IFC_REG(4)  _IFC_REG(5)  _IFC_REG(6)  _IFC_REG(7)
>+	_IFC_REG(8)  _IFC_REG(9)  _IFC_REG(10) _IFC_REG(11)
>+	_IFC_REG(12) _IFC_REG(13) _IFC_REG(14) _IFC_REG(15)
>+	_IFC_REG(16) _IFC_REG(17) _IFC_REG(18) _IFC_REG(19)
>+	_IFC_REG(20) _IFC_REG(21) _IFC_REG(22) _IFC_REG(23)
>+	_IFC_REG(24) _IFC_REG(25) _IFC_REG(26) _IFC_REG(27)
>+	_IFC_REG(28) _IFC_REG(29) _IFC_REG(30) _IFC_REG(31)
>+	".iflt	\\var\n\t"
>+	".error	\"Unable to parse register name \\r\"\n\t"
>+	".endif\n\t"
>+	".endm");
>+

In inline assembler, we can add asmSymbolicName in Input/ Output Operands, format:
[ [asmSymbolicName] ] constraint (cExpression)
[ [asmSymbolicName] ] constraint (cVariableName)

> #endif /* AVCODEC_MIPS_ASMDEFS_H */
>--
>2.20.1
>_______________________________________________
>ffmpeg-devel mailing list
>ffmpeg-devel@ffmpeg.org
>https://ffmpeg.org/mailman/listinfo/ffmpeg-devel
>
>To unsubscribe, visit link above, or email
>ffmpeg-devel-request@ffmpeg.org with subject "unsubscribe".
Jiaxun Yang June 8, 2020, 6:03 p.m. UTC | #2 
于 2020年6月8日 GMT+08:00 下午4:38:58, Shiyou Yin <yinshiyou-hf@loongson.cn> 写到:
>>-----Original Message-----
>>From: ffmpeg-devel-bounces@ffmpeg.org [mailto:ffmpeg-devel-bounces@ffmpeg.org] On Behalf Of
>>Jiaxun Yang
>>Sent: Monday, June 8, 2020 11:30 AM
>>To: ffmpeg-devel@ffmpeg.org
>>Cc: yinshiyou@loongson.cn; Jiaxun Yang
>>Subject: [FFmpeg-devel] [PATCH v4 2/4] libavutils: Add parse_r helper for MIPS
>>

[...]

>In inline assembler, we can add asmSymbolicName in Input/ Output Operands, format:
>[ [asmSymbolicName] ] constraint (cExpression)
>[ [asmSymbolicName] ] constraint (cVariableName)

Could you expand it?
I'm not really sure how that related to our case.

I'm trying to use raw opcode in inline assembly and I need
this helper to deal with oprands in raw opcode.

Thanks!

>
>> #endif /* AVCODEC_MIPS_ASMDEFS_H */
>>--
>>2.20.1
>>_______________________________________________
>>ffmpeg-devel mailing list
>>ffmpeg-devel@ffmpeg.org
>>https://ffmpeg.org/mailman/listinfo/ffmpeg-devel
>>
>>To unsubscribe, visit link above, or email
>>ffmpeg-devel-request@ffmpeg.org with subject "unsubscribe".
>
>_______________________________________________
>ffmpeg-devel mailing list
>ffmpeg-devel@ffmpeg.org
>https://ffmpeg.org/mailman/listinfo/ffmpeg-devel
>
>To unsubscribe, visit link above, or email
>ffmpeg-devel-request@ffmpeg.org with subject "unsubscribe".
Shiyou Yin June 9, 2020, 5:43 a.m. UTC | #3 
>-----Original Message-----
>From: jiaxun.yang@flygoat.com [mailto:jiaxun.yang@flygoat.com]
>Sent: Tuesday, June 9, 2020 2:03 AM
>To: FFmpeg development discussions and patches; Shiyou Yin; 'FFmpeg development discussions and
>patches'
>Subject: Re: [FFmpeg-devel] [PATCH v4 2/4] libavutils: Add parse_r helper for MIPS
>
>
>
>于 2020年6月8日 GMT+08:00 下午4:38:58, Shiyou Yin <yinshiyou-hf@loongson.cn> 写到:
>>>-----Original Message-----
>>>From: ffmpeg-devel-bounces@ffmpeg.org [mailto:ffmpeg-devel-bounces@ffmpeg.org] On Behalf Of
>>>Jiaxun Yang
>>>Sent: Monday, June 8, 2020 11:30 AM
>>>To: ffmpeg-devel@ffmpeg.org
>>>Cc: yinshiyou@loongson.cn; Jiaxun Yang
>>>Subject: [FFmpeg-devel] [PATCH v4 2/4] libavutils: Add parse_r helper for MIPS
>>>
>
>[...]
>
>>In inline assembler, we can add asmSymbolicName in Input/ Output Operands, format:
>>[ [asmSymbolicName] ] constraint (cExpression)
>>[ [asmSymbolicName] ] constraint (cVariableName)
>
>Could you expand it?
>I'm not really sure how that related to our case.
>
>I'm trying to use raw opcode in inline assembly and I need
>this helper to deal with oprands in raw opcode.
>
>Thanks!
>

For the raw opcode case, another proposal for your reference.
static uint32_t read_cpucfg_2(uint32_t reg)
{
    register uint32_t input __asm__ ("t0") = reg;
    register uint32_t __res __asm__ ("t1") = 0;
    __asm__ volatile(
        ".insn                     \n\t"
        ".word (0xc9084918)         \n\t"
    );
    return __res;
}
Jiaxun Yang June 9, 2020, 5:59 a.m. UTC | #4 
于 2020年6月9日 GMT+08:00 下午1:43:58, Shiyou Yin <yinshiyou-hf@loongson.cn> 写到:
>>-----Original Message-----
>>From: jiaxun.yang@flygoat.com [mailto:jiaxun.yang@flygoat.com]
>>Sent: Tuesday, June 9, 2020 2:03 AM
>>To: FFmpeg development discussions and patches; Shiyou Yin; 'FFmpeg development discussions and
>>patches'
>>Subject: Re: [FFmpeg-devel] [PATCH v4 2/4] libavutils: Add parse_r helper for MIPS
>>
>>
>>
>>于 2020年6月8日 GMT+08:00 下午4:38:58, Shiyou Yin <yinshiyou-hf@loongson.cn> 写到:
>>>>-----Original Message-----
>>>>From: ffmpeg-devel-bounces@ffmpeg.org [mailto:ffmpeg-devel-bounces@ffmpeg.org] On Behalf Of
>>>>Jiaxun Yang
>>>>Sent: Monday, June 8, 2020 11:30 AM
>>>>To: ffmpeg-devel@ffmpeg.org
>>>>Cc: yinshiyou@loongson.cn; Jiaxun Yang
>>>>Subject: [FFmpeg-devel] [PATCH v4 2/4] libavutils: Add parse_r helper for MIPS
>>>>
>>
>>[...]
>>
>>>In inline assembler, we can add asmSymbolicName in Input/ Output Operands, format:
>>>[ [asmSymbolicName] ] constraint (cExpression)
>>>[ [asmSymbolicName] ] constraint (cVariableName)
>>
>>Could you expand it?
>>I'm not really sure how that related to our case.
>>
>>I'm trying to use raw opcode in inline assembly and I need
>>this helper to deal with oprands in raw opcode.
>>
>>Thanks!
>>
>
>For the raw opcode case, another proposal for your reference.
>static uint32_t read_cpucfg_2(uint32_t reg)
>{
>    register uint32_t input __asm__ ("t0") = reg;
>    register uint32_t __res __asm__ ("t1") = 0;
>    __asm__ volatile(
>        ".insn                     \n\t"
>        ".word (0xc9084918)         \n\t"
>    );
>    return __res;

Actually this is not always safe.
t0 and t1 might be clobbered by compiler optimization.

>}

I need this helper to ensure the register usage is guarded by
compiler's allocation system.

>
Shiyou Yin June 9, 2020, 9:22 a.m. UTC | #5 
>-----Original Message-----
>From: ffmpeg-devel-bounces@ffmpeg.org [mailto:ffmpeg-devel-bounces@ffmpeg.org] On Behalf Of
>jiaxun.yang@flygoat.com
>Sent: Tuesday, June 9, 2020 1:59 PM
>To: Shiyou Yin; 'FFmpeg development discussions and patches'
>Subject: Re: [FFmpeg-devel] [PATCH v4 2/4] libavutils: Add parse_r helper for MIPS
>
>
>
>于 2020年6月9日 GMT+08:00 下午1:43:58, Shiyou Yin <yinshiyou-hf@loongson.cn> 写到:
>>>-----Original Message-----
>>>From: jiaxun.yang@flygoat.com [mailto:jiaxun.yang@flygoat.com]
>>>Sent: Tuesday, June 9, 2020 2:03 AM
>>>To: FFmpeg development discussions and patches; Shiyou Yin; 'FFmpeg development discussions and
>>>patches'
>>>Subject: Re: [FFmpeg-devel] [PATCH v4 2/4] libavutils: Add parse_r helper for MIPS
>>>
>>>
>>>
>>>于 2020年6月8日 GMT+08:00 下午4:38:58, Shiyou Yin <yinshiyou-hf@loongson.cn> 写到:
>>>>>-----Original Message-----
>>>>>From: ffmpeg-devel-bounces@ffmpeg.org [mailto:ffmpeg-devel-bounces@ffmpeg.org] On Behalf Of
>>>>>Jiaxun Yang
>>>>>Sent: Monday, June 8, 2020 11:30 AM
>>>>>To: ffmpeg-devel@ffmpeg.org
>>>>>Cc: yinshiyou@loongson.cn; Jiaxun Yang
>>>>>Subject: [FFmpeg-devel] [PATCH v4 2/4] libavutils: Add parse_r helper for MIPS
>>>>>
>>>
>>>[...]
>>>
>>>>In inline assembler, we can add asmSymbolicName in Input/ Output Operands, format:
>>>>[ [asmSymbolicName] ] constraint (cExpression)
>>>>[ [asmSymbolicName] ] constraint (cVariableName)
>>>
>>>Could you expand it?
>>>I'm not really sure how that related to our case.
>>>
>>>I'm trying to use raw opcode in inline assembly and I need
>>>this helper to deal with oprands in raw opcode.
>>>
>>>Thanks!
>>>
>>
>>For the raw opcode case, another proposal for your reference.
>>static uint32_t read_cpucfg_2(uint32_t reg)
>>{
>>    register uint32_t input __asm__ ("t0") = reg;
>>    register uint32_t __res __asm__ ("t1") = 0;
>>    __asm__ volatile(
>>        ".insn                     \n\t"
>>        ".word (0xc9084918)         \n\t"
>>    );
>>    return __res;
>
>Actually this is not always safe.
>t0 and t1 might be clobbered by compiler optimization.
>
>>}
>
>I need this helper to ensure the register usage is guarded by
>compiler's allocation system.
>

Got it, than LGTM.

>--
>Jiaxun Yang
>_______________________________________________
>ffmpeg-devel mailing list
>ffmpeg-devel@ffmpeg.org
>https://ffmpeg.org/mailman/listinfo/ffmpeg-devel
>
>To unsubscribe, visit link above, or email
>ffmpeg-devel-request@ffmpeg.org with subject "unsubscribe".