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[FFmpeg-devel,1/3] riscv: factor out the bswap32 assembler

Message ID 20230929171641.85165-1-remi@remlab.net
State New
Headers show
Series [FFmpeg-devel,1/3] riscv: factor out the bswap32 assembler | expand

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Commit Message

Rémi Denis-Courmont Sept. 29, 2023, 5:16 p.m. UTC 
---
 libavcodec/riscv/bswapdsp_rvb.S | 43 +---------------------
 libavutil/riscv/bswap_rvb.S     | 65 +++++++++++++++++++++++++++++++++
 2 files changed, 67 insertions(+), 41 deletions(-)
 create mode 100644 libavutil/riscv/bswap_rvb.S
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Patch

diff --git a/libavcodec/riscv/bswapdsp_rvb.S b/libavcodec/riscv/bswapdsp_rvb.S
index 91b47bf82d..0786bd3f36 100644
--- a/libavcodec/riscv/bswapdsp_rvb.S
+++ b/libavcodec/riscv/bswapdsp_rvb.S
@@ -20,49 +20,10 @@ 
 
 #include "config.h"
 #include "libavutil/riscv/asm.S"
+#include "libavutil/riscv/bswap_rvb.S"
 
 #if (__riscv_xlen >= 64)
 func ff_bswap32_buf_rvb, zbb
-        andi    t0, a1, 4
-        beqz    t0, 1f
-        /* Align a1 (input) to 64-bit */
-        lwu     t0, (a1)
-        addi    a0, a0, 4
-        rev8    t0, t0
-        addi    a2, a2, -1
-        srli    t0, t0, __riscv_xlen - 32
-        addi    a1, a1, 4
-        sw      t0, -4(a0)
-1:
-        andi    a3, a2, -2
-        sh2add  a2, a2, a0
-        beqz    a3, 3f
-        sh2add  a3, a3, a0
-2:      /* 2 elements (64 bits) at a time on a 64-bit boundary */
-        ld      t0,  (a1)
-        addi    a0, a0, 8
-        rev8    t0, t0
-#if (__riscv_xlen == 64)
-        srli    t2, t0, 32
-        sw      t0, -4(a0)
-#else
-        srli    t1, t0, __riscv_xlen - 64
-        srli    t2, t0, __riscv_xlen - 32
-        sw      t1, -4(a0)
-#endif
-        addi    a1, a1, 8
-        sw      t2, -8(a0)
-        bne     a0, a3, 2b
-3:
-        beq     a0, a2, 5f
-4:      /* Process last element */
-        lwu     t0, (a1)
-        addi    a0, a0, 4
-        rev8    t0, t0
-        addi    a1, a1, 4
-        srli    t0, t0, __riscv_xlen - 32
-        sw      t0, -4(a0)
-5:
-        ret
+        bswap32_rvb a0, a1, a2
 endfunc
 #endif
diff --git a/libavutil/riscv/bswap_rvb.S b/libavutil/riscv/bswap_rvb.S
new file mode 100644
index 0000000000..b391e2f9f1
--- /dev/null
+++ b/libavutil/riscv/bswap_rvb.S
@@ -0,0 +1,65 @@ 
+/*
+ * Copyright © 2022 Rémi Denis-Courmont.
+ *
+ * This file is part of FFmpeg.
+ *
+ * FFmpeg is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * FFmpeg is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with FFmpeg; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#if (__riscv_xlen >= 64)
+	.macro  bswap32_rvb out, in, count
+        andi    t0, \count, 4
+        beqz    t0, 1f
+        /* Align input to 64-bit */
+        lwu     t0, (\in)
+        addi    \out, \out, 4
+        rev8    t0, t0
+        addi    \count, \count, -1
+        srli    t0, t0, __riscv_xlen - 32
+        addi    \in, \in, 4
+        sw      t0, -4(\out)
+1:
+        andi    t3, \count, -2
+        sh2add  \count, \count, \out
+        beqz    t3, 3f
+        sh2add  t3, t3, \out
+2:      /* 2 elements (64 bits) at a time on a 64-bit boundary */
+        ld      t0,  (\in)
+        addi    \out, \out, 8
+        rev8    t0, t0
+#if (__riscv_xlen == 64)
+        srli    t2, t0, 32
+        sw      t0, -4(\out)
+#else
+        srli    t1, t0, __riscv_xlen - 64
+        srli    t2, t0, __riscv_xlen - 32
+        sw      t1, -4(\out)
+#endif
+        addi    \in, \in, 8
+        sw      t2, -8(\out)
+        bne     \out, t3, 2b
+3:
+        beq     \out, \count, 5f
+4:      /* Process last element */
+        lwu     t0, (\in)
+        addi    \out, \out, 4
+        rev8    t0, t0
+        addi    \in, \in, 4
+        srli    t0, t0, __riscv_xlen - 32
+        sw      t0, -4(\out)
+5:
+        ret
+        .endm
+#endif