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[FFmpeg-devel] checkasm/riscv: use t0 as alternative link register

Message ID 20231116160451.37296-1-remi@remlab.net
State New
Headers show
Series [FFmpeg-devel] checkasm/riscv: use t0 as alternative link register | expand


Context Check Description
yinshiyou/make_loongarch64 success Make finished
yinshiyou/make_fate_loongarch64 success Make fate finished
andriy/make_x86 success Make finished
andriy/make_fate_x86 success Make fate finished

Commit Message

Rémi Denis-Courmont Nov. 16, 2023, 4:04 p.m. UTC
The unprivileged ISA specification says that either RA or T0 should be
used for this purpose. Other registers may confuse the return address
prediction stack.
 tests/checkasm/riscv/checkasm.S | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
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diff --git a/tests/checkasm/riscv/checkasm.S b/tests/checkasm/riscv/checkasm.S
index 73ca85f344..b902ab1043 100644
--- a/tests/checkasm/riscv/checkasm.S
+++ b/tests/checkasm/riscv/checkasm.S
@@ -123,10 +123,10 @@  func checkasm_get_wrapper, v
         /* Call the tested function */
         la.tls.ie t0, checked_func
-        add     t0, tp, t0
-        ld      t1, (t0)
-        sd      zero, (t0)
-        jalr    t1
+        add     t1, tp, t0
+        ld      t0, (t1)
+        sd      zero, (t1)
+        jalr    t0
         /* Check special register values */
         la.tls.ie t0, saved_regs