[FFmpeg-devel,14/21] aarch64: hevc: Implement a neon version of hevc_qpel_uni_w_h*_8

Message ID	20240325150243.59058-15-martin@martin.st
State	Accepted
Commit	ad01d06f919f25147f857efc4f143b5469e2f92f
Headers	show Delivered-To: ffmpegpatchwork2@gmail.com Received-SPF: pass (google.com: domain of ffmpeg-devel-bounces@ffmpeg.org designates 79.124.17.100 as permitted sender) client-ip=79.124.17.100; From: =?utf-8?q?Martin_Storsj=C3=B6?= <martin@martin.st> To: ffmpeg-devel@ffmpeg.org Date: Mon, 25 Mar 2024 17:02:36 +0200 Message-Id: <20240325150243.59058-15-martin@martin.st> In-Reply-To: <20240325150243.59058-1-martin@martin.st> References: <20240325150243.59058-1-martin@martin.st> MIME-Version: 1.0 Subject: [FFmpeg-devel] [PATCH 14/21] aarch64: hevc: Implement a neon version of hevc_qpel_uni_w_h*_8 Precedence: list Reply-To: FFmpeg development discussions and patches <ffmpeg-devel@ffmpeg.org> Cc: Logan Lyu <Logan.Lyu@myais.com.cn>, "J . Dekker" <jdek@itanimul.li> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" <ffmpeg-devel-bounces@ffmpeg.org>
Series	aarch64: hevc: Add missing hevc_pel NEON functions \| expand [FFmpeg-devel,00/21] aarch64: hevc: Add missing hevc_pel NEON functions [FFmpeg-devel,01/21] aarch64: hevc: Reorder a misplaced function init line [FFmpeg-devel,02/21] aarch64: hevc: Don't iterate with sp in ff_hevc_put_hevc_qpel_uni_w_hv32/64_8_… [FFmpeg-devel,03/21] aarch64: hevc: Merge consecutive stores in put_hevc_\type\()_h16_8_neon [FFmpeg-devel,04/21] aarch64: hevc: Specialize put_hevc_\type\()_h_8_neon for horizontal looping [FFmpeg-devel,05/21] aarch64: hevc: Use ld1r instead of ldr+dup in hevc_qpel_uni_w_h [FFmpeg-devel,06/21] aarch64: hevc: Implement a neon version of put_hevc_epel_h_8 [FFmpeg-devel,07/21] aarch64: hevc: Implement a neon version of hevc_epel_uni_w_h_8 [FFmpeg-devel,08/21] aarch64: hevc: Split the epel__hv functions into two parts [FFmpeg-devel,09/21] aarch64: hevc: Reorder epel_hv functions to prepare for templating [FFmpeg-devel,10/21] aarch64: hevc: Produce epel_hv functions for both plain neon and i8mm [FFmpeg-devel,11/21] aarch64: hevc: Produce epel_uni_hv functions for both neon and i8mm [FFmpeg-devel,12/21] aarch64: hevc: Produce epel_uni_w_hv functions for both neon and i8mm [FFmpeg-devel,13/21] aarch64: hevc: Produce epel_bi_hv functions for both neon and i8mm [FFmpeg-devel,14/21] aarch64: hevc: Implement a neon version of hevc_qpel_uni_w_h_8 [FFmpeg-devel,15/21] aarch64: hevc: Split the qpel__hv functions into two parts [FFmpeg-devel,16/21] aarch64: hevc: Deduplicate the hevc_put_hevc_qpel_uni_w_hv*_8_end_neon functio… [FFmpeg-devel,17/21] aarch64: hevc: Reorder qpel_hv functions to prepare for templating [FFmpeg-devel,18/21] aarch64: hevc: Produce plain neon versions of qpel_hv [FFmpeg-devel,19/21] aarch64: hevc: Produce plain neon versions of qpel_uni_hv [FFmpeg-devel,20/21] aarch64: hevc: Produce plain neon versions of qpel_uni_w_hv [FFmpeg-devel,21/21] aarch64: hevc: Produce plain neon versions of qpel_bi_hv

Context	Check	Description
yinshiyou/make_loongarch64	success	Make finished
yinshiyou/make_fate_loongarch64	success	Make fate finished
andriy/make_x86	success	Make finished
andriy/make_fate_x86	success	Make fate finished

diff --git a/libavcodec/aarch64/hevcdsp_init_aarch64.c b/libavcodec/aarch64/hevcdsp_init_aarch64.c index 6110a360d8..ea0d26c019 100644 --- a/libavcodec/aarch64/hevcdsp_init_aarch64.c +++ b/libavcodec/aarch64/hevcdsp_init_aarch64.c @@ -277,6 +277,11 @@ NEON8_FNPROTO(qpel_uni_hv, (uint8_t *dst, ptrdiff_t dststride, const uint8_t *src, ptrdiff_t srcstride, int height, intptr_t mx, intptr_t my, int width), _i8mm); +NEON8_FNPROTO(qpel_uni_w_h, (uint8_t *_dst, ptrdiff_t _dststride, + const uint8_t *_src, ptrdiff_t _srcstride, + int height, int denom, int wx, int ox, + intptr_t mx, intptr_t my, int width),); + NEON8_FNPROTO(qpel_uni_w_h, (uint8_t *_dst, ptrdiff_t _dststride, const uint8_t *_src, ptrdiff_t _srcstride, int height, int denom, int wx, int ox, @@ -429,6 +434,8 @@ av_cold void ff_hevc_dsp_init_aarch64(HEVCDSPContext *c, const int bit_depth) NEON8_FNASSIGN(c->put_hevc_epel_uni_w, 1, 1, epel_uni_w_hv,); NEON8_FNASSIGN(c->put_hevc_epel_bi, 1, 1, epel_bi_hv,); + NEON8_FNASSIGN_SHARED_32(c->put_hevc_qpel_uni_w, 0, 1, qpel_uni_w_h,); + if (have_i8mm(cpu_flags)) { NEON8_FNASSIGN(c->put_hevc_epel, 0, 1, epel_h, _i8mm); NEON8_FNASSIGN(c->put_hevc_epel, 1, 1, epel_hv, _i8mm); diff --git a/libavcodec/aarch64/hevcdsp_qpel_neon.S b/libavcodec/aarch64/hevcdsp_qpel_neon.S index 062b7d4d0f..fba063186c 100644 --- a/libavcodec/aarch64/hevcdsp_qpel_neon.S +++ b/libavcodec/aarch64/hevcdsp_qpel_neon.S @@ -2456,8 +2456,10 @@ function ff_hevc_put_hevc_qpel_uni_hv64_8_neon_i8mm, export=1 ldp x7, x30, [sp], #48 b .Lqpel_uni_hv16_loop endfunc +DISABLE_I8MM +#endif -.macro QPEL_UNI_W_H_HEADER +.macro QPEL_UNI_W_H_HEADER elems=4s ldr x12, [sp] sub x2, x2, #3 movrel x9, qpel_filters @@ -2465,11 +2467,410 @@ endfunc ld1r {v28.2d}, [x9] mov w10, #-6 sub w10, w10, w5 - dup v30.4s, w6 // wx + dup v30.\elems, w6 // wx dup v31.4s, w10 // shift dup v29.4s, w7 // ox .endm +function ff_hevc_put_hevc_qpel_uni_w_h4_8_neon, export=1 + QPEL_UNI_W_H_HEADER 4h + sxtl v0.8h, v28.8b +1: + ld1 {v1.8b, v2.8b}, [x2], x3 + subs w4, w4, #1 + uxtl v1.8h, v1.8b + uxtl v2.8h, v2.8b + ext v3.16b, v1.16b, v2.16b, #2 + ext v4.16b, v1.16b, v2.16b, #4 + ext v5.16b, v1.16b, v2.16b, #6 + ext v6.16b, v1.16b, v2.16b, #8 + ext v7.16b, v1.16b, v2.16b, #10 + ext v16.16b, v1.16b, v2.16b, #12 + ext v17.16b, v1.16b, v2.16b, #14 + mul v18.4h, v1.4h, v0.h[0] + mla v18.4h, v3.4h, v0.h[1] + mla v18.4h, v4.4h, v0.h[2] + mla v18.4h, v5.4h, v0.h[3] + mla v18.4h, v6.4h, v0.h[4] + mla v18.4h, v7.4h, v0.h[5] + mla v18.4h, v16.4h, v0.h[6] + mla v18.4h, v17.4h, v0.h[7] + smull v16.4s, v18.4h, v30.4h + sqrshl v16.4s, v16.4s, v31.4s + sqadd v16.4s, v16.4s, v29.4s + sqxtn v16.4h, v16.4s + sqxtun v16.8b, v16.8h + str s16, [x0] + add x0, x0, x1 + b.hi 1b + ret +endfunc + +function ff_hevc_put_hevc_qpel_uni_w_h6_8_neon, export=1 + QPEL_UNI_W_H_HEADER 8h + sub x1, x1, #4 + sxtl v0.8h, v28.8b +1: + ld1 {v1.8b, v2.8b}, [x2], x3 + subs w4, w4, #1 + uxtl v1.8h, v1.8b + uxtl v2.8h, v2.8b + ext v3.16b, v1.16b, v2.16b, #2 + ext v4.16b, v1.16b, v2.16b, #4 + ext v5.16b, v1.16b, v2.16b, #6 + ext v6.16b, v1.16b, v2.16b, #8 + ext v7.16b, v1.16b, v2.16b, #10 + ext v16.16b, v1.16b, v2.16b, #12 + ext v17.16b, v1.16b, v2.16b, #14 + mul v18.8h, v1.8h, v0.h[0] + mla v18.8h, v3.8h, v0.h[1] + mla v18.8h, v4.8h, v0.h[2] + mla v18.8h, v5.8h, v0.h[3] + mla v18.8h, v6.8h, v0.h[4] + mla v18.8h, v7.8h, v0.h[5] + mla v18.8h, v16.8h, v0.h[6] + mla v18.8h, v17.8h, v0.h[7] + smull v16.4s, v18.4h, v30.4h + smull2 v17.4s, v18.8h, v30.8h + sqrshl v16.4s, v16.4s, v31.4s + sqrshl v17.4s, v17.4s, v31.4s + sqadd v16.4s, v16.4s, v29.4s + sqadd v17.4s, v17.4s, v29.4s + sqxtn v16.4h, v16.4s + sqxtn2 v16.8h, v17.4s + sqxtun v16.8b, v16.8h + str s16, [x0], #4 + st1 {v16.h}[2], [x0], x1 + b.hi 1b + ret +endfunc + +function ff_hevc_put_hevc_qpel_uni_w_h8_8_neon, export=1 + QPEL_UNI_W_H_HEADER 8h + sxtl v0.8h, v28.8b +1: + ld1 {v1.8b, v2.8b}, [x2], x3 + subs w4, w4, #1 + uxtl v1.8h, v1.8b + uxtl v2.8h, v2.8b + ext v3.16b, v1.16b, v2.16b, #2 + ext v4.16b, v1.16b, v2.16b, #4 + ext v5.16b, v1.16b, v2.16b, #6 + ext v6.16b, v1.16b, v2.16b, #8 + ext v7.16b, v1.16b, v2.16b, #10 + ext v16.16b, v1.16b, v2.16b, #12 + ext v17.16b, v1.16b, v2.16b, #14 + mul v18.8h, v1.8h, v0.h[0] + mla v18.8h, v3.8h, v0.h[1] + mla v18.8h, v4.8h, v0.h[2] + mla v18.8h, v5.8h, v0.h[3] + mla v18.8h, v6.8h, v0.h[4] + mla v18.8h, v7.8h, v0.h[5] + mla v18.8h, v16.8h, v0.h[6] + mla v18.8h, v17.8h, v0.h[7] + smull v16.4s, v18.4h, v30.4h + smull2 v17.4s, v18.8h, v30.8h + sqrshl v16.4s, v16.4s, v31.4s + sqrshl v17.4s, v17.4s, v31.4s + sqadd v16.4s, v16.4s, v29.4s + sqadd v17.4s, v17.4s, v29.4s + sqxtn v16.4h, v16.4s + sqxtn2 v16.8h, v17.4s + sqxtun v16.8b, v16.8h + st1 {v16.8b}, [x0], x1 + b.hi 1b + ret +endfunc + +function ff_hevc_put_hevc_qpel_uni_w_h12_8_neon, export=1 + QPEL_UNI_W_H_HEADER 8h + add x13, x0, #8 + sxtl v0.8h, v28.8b +1: + ld1 {v1.8b, v2.8b, v3.8b}, [x2], x3 + subs w4, w4, #1 + uxtl v1.8h, v1.8b + uxtl v2.8h, v2.8b + uxtl v3.8h, v3.8b + ext v4.16b, v1.16b, v2.16b, #2 + ext v5.16b, v1.16b, v2.16b, #4 + ext v6.16b, v1.16b, v2.16b, #6 + ext v7.16b, v1.16b, v2.16b, #8 + ext v16.16b, v1.16b, v2.16b, #10 + ext v17.16b, v1.16b, v2.16b, #12 + ext v18.16b, v1.16b, v2.16b, #14 + mul v19.8h, v1.8h, v0.h[0] + mla v19.8h, v4.8h, v0.h[1] + mla v19.8h, v5.8h, v0.h[2] + mla v19.8h, v6.8h, v0.h[3] + mla v19.8h, v7.8h, v0.h[4] + mla v19.8h, v16.8h, v0.h[5] + mla v19.8h, v17.8h, v0.h[6] + mla v19.8h, v18.8h, v0.h[7] + ext v4.16b, v2.16b, v3.16b, #2 + ext v5.16b, v2.16b, v3.16b, #4 + ext v6.16b, v2.16b, v3.16b, #6 + ext v7.16b, v2.16b, v3.16b, #8 + ext v16.16b, v2.16b, v3.16b, #10 + ext v17.16b, v2.16b, v3.16b, #12 + ext v18.16b, v2.16b, v3.16b, #14 + mul v20.4h, v2.4h, v0.h[0] + mla v20.4h, v4.4h, v0.h[1] + mla v20.4h, v5.4h, v0.h[2] + mla v20.4h, v6.4h, v0.h[3] + mla v20.4h, v7.4h, v0.h[4] + mla v20.4h, v16.4h, v0.h[5] + mla v20.4h, v17.4h, v0.h[6] + mla v20.4h, v18.4h, v0.h[7] + smull v16.4s, v19.4h, v30.4h + smull2 v17.4s, v19.8h, v30.8h + smull v18.4s, v20.4h, v30.4h + sqrshl v16.4s, v16.4s, v31.4s + sqrshl v17.4s, v17.4s, v31.4s + sqrshl v18.4s, v18.4s, v31.4s + sqadd v16.4s, v16.4s, v29.4s + sqadd v17.4s, v17.4s, v29.4s + sqadd v18.4s, v18.4s, v29.4s + sqxtn v16.4h, v16.4s + sqxtn2 v16.8h, v17.4s + sqxtn v17.4h, v18.4s + sqxtun v16.8b, v16.8h + sqxtun v17.8b, v17.8h + st1 {v16.8b}, [x0], x1 + st1 {v17.s}[0], [x13], x1 + b.hi 1b + ret +endfunc + +function ff_hevc_put_hevc_qpel_uni_w_h16_8_neon, export=1 + QPEL_UNI_W_H_HEADER 8h + sxtl v0.8h, v28.8b +1: + ld1 {v1.8b, v2.8b, v3.8b}, [x2], x3 + subs w4, w4, #1 + uxtl v1.8h, v1.8b + uxtl v2.8h, v2.8b + uxtl v3.8h, v3.8b + ext v4.16b, v1.16b, v2.16b, #2 + ext v5.16b, v1.16b, v2.16b, #4 + ext v6.16b, v1.16b, v2.16b, #6 + ext v7.16b, v1.16b, v2.16b, #8 + ext v16.16b, v1.16b, v2.16b, #10 + ext v17.16b, v1.16b, v2.16b, #12 + ext v18.16b, v1.16b, v2.16b, #14 + mul v19.8h, v1.8h, v0.h[0] + mla v19.8h, v4.8h, v0.h[1] + mla v19.8h, v5.8h, v0.h[2] + mla v19.8h, v6.8h, v0.h[3] + mla v19.8h, v7.8h, v0.h[4] + mla v19.8h, v16.8h, v0.h[5] + mla v19.8h, v17.8h, v0.h[6] + mla v19.8h, v18.8h, v0.h[7] + ext v4.16b, v2.16b, v3.16b, #2 + ext v5.16b, v2.16b, v3.16b, #4 + ext v6.16b, v2.16b, v3.16b, #6 + ext v7.16b, v2.16b, v3.16b, #8 + ext v16.16b, v2.16b, v3.16b, #10 + ext v17.16b, v2.16b, v3.16b, #12 + ext v18.16b, v2.16b, v3.16b, #14 + mul v20.8h, v2.8h, v0.h[0] + mla v20.8h, v4.8h, v0.h[1] + mla v20.8h, v5.8h, v0.h[2] + mla v20.8h, v6.8h, v0.h[3] + mla v20.8h, v7.8h, v0.h[4] + mla v20.8h, v16.8h, v0.h[5] + mla v20.8h, v17.8h, v0.h[6] + mla v20.8h, v18.8h, v0.h[7] + smull v16.4s, v19.4h, v30.4h + smull2 v17.4s, v19.8h, v30.8h + smull v18.4s, v20.4h, v30.4h + smull2 v19.4s, v20.8h, v30.8h + sqrshl v16.4s, v16.4s, v31.4s + sqrshl v17.4s, v17.4s, v31.4s + sqrshl v18.4s, v18.4s, v31.4s + sqrshl v19.4s, v19.4s, v31.4s + sqadd v16.4s, v16.4s, v29.4s + sqadd v17.4s, v17.4s, v29.4s + sqadd v18.4s, v18.4s, v29.4s + sqadd v19.4s, v19.4s, v29.4s + sqxtn v16.4h, v16.4s + sqxtn2 v16.8h, v17.4s + sqxtn v17.4h, v18.4s + sqxtn2 v17.8h, v19.4s + sqxtun v16.8b, v16.8h + sqxtun v17.8b, v17.8h + st1 {v16.8b, v17.8b}, [x0], x1 + b.hi 1b + ret +endfunc + +function ff_hevc_put_hevc_qpel_uni_w_h24_8_neon, export=1 + QPEL_UNI_W_H_HEADER 8h + sxtl v0.8h, v28.8b +1: + ld1 {v1.8b, v2.8b, v3.8b, v4.8b}, [x2], x3 + subs w4, w4, #1 + uxtl v1.8h, v1.8b + uxtl v2.8h, v2.8b + uxtl v3.8h, v3.8b + uxtl v4.8h, v4.8b + ext v5.16b, v1.16b, v2.16b, #2 + ext v6.16b, v1.16b, v2.16b, #4 + ext v7.16b, v1.16b, v2.16b, #6 + ext v16.16b, v1.16b, v2.16b, #8 + ext v17.16b, v1.16b, v2.16b, #10 + ext v18.16b, v1.16b, v2.16b, #12 + ext v19.16b, v1.16b, v2.16b, #14 + mul v20.8h, v1.8h, v0.h[0] + mla v20.8h, v5.8h, v0.h[1] + mla v20.8h, v6.8h, v0.h[2] + mla v20.8h, v7.8h, v0.h[3] + mla v20.8h, v16.8h, v0.h[4] + mla v20.8h, v17.8h, v0.h[5] + mla v20.8h, v18.8h, v0.h[6] + mla v20.8h, v19.8h, v0.h[7] + ext v5.16b, v2.16b, v3.16b, #2 + ext v6.16b, v2.16b, v3.16b, #4 + ext v7.16b, v2.16b, v3.16b, #6 + ext v16.16b, v2.16b, v3.16b, #8 + ext v17.16b, v2.16b, v3.16b, #10 + ext v18.16b, v2.16b, v3.16b, #12 + ext v19.16b, v2.16b, v3.16b, #14 + mul v21.8h, v2.8h, v0.h[0] + mla v21.8h, v5.8h, v0.h[1] + mla v21.8h, v6.8h, v0.h[2] + mla v21.8h, v7.8h, v0.h[3] + mla v21.8h, v16.8h, v0.h[4] + mla v21.8h, v17.8h, v0.h[5] + mla v21.8h, v18.8h, v0.h[6] + mla v21.8h, v19.8h, v0.h[7] + ext v5.16b, v3.16b, v4.16b, #2 + ext v6.16b, v3.16b, v4.16b, #4 + ext v7.16b, v3.16b, v4.16b, #6 + ext v16.16b, v3.16b, v4.16b, #8 + ext v17.16b, v3.16b, v4.16b, #10 + ext v18.16b, v3.16b, v4.16b, #12 + ext v19.16b, v3.16b, v4.16b, #14 + mul v22.8h, v3.8h, v0.h[0] + mla v22.8h, v5.8h, v0.h[1] + mla v22.8h, v6.8h, v0.h[2] + mla v22.8h, v7.8h, v0.h[3] + mla v22.8h, v16.8h, v0.h[4] + mla v22.8h, v17.8h, v0.h[5] + mla v22.8h, v18.8h, v0.h[6] + mla v22.8h, v19.8h, v0.h[7] + smull v16.4s, v20.4h, v30.4h + smull2 v17.4s, v20.8h, v30.8h + smull v18.4s, v21.4h, v30.4h + smull2 v19.4s, v21.8h, v30.8h + smull v20.4s, v22.4h, v30.4h + smull2 v21.4s, v22.8h, v30.8h + sqrshl v16.4s, v16.4s, v31.4s + sqrshl v17.4s, v17.4s, v31.4s + sqrshl v18.4s, v18.4s, v31.4s + sqrshl v19.4s, v19.4s, v31.4s + sqrshl v20.4s, v20.4s, v31.4s + sqrshl v21.4s, v21.4s, v31.4s + sqadd v16.4s, v16.4s, v29.4s + sqadd v17.4s, v17.4s, v29.4s + sqadd v18.4s, v18.4s, v29.4s + sqadd v19.4s, v19.4s, v29.4s + sqadd v20.4s, v20.4s, v29.4s + sqadd v21.4s, v21.4s, v29.4s + sqxtn v16.4h, v16.4s + sqxtn2 v16.8h, v17.4s + sqxtn v17.4h, v18.4s + sqxtn2 v17.8h, v19.4s + sqxtn v18.4h, v20.4s + sqxtn2 v18.8h, v21.4s + sqxtun v16.8b, v16.8h + sqxtun v17.8b, v17.8h + sqxtun v18.8b, v18.8h + st1 {v16.8b, v17.8b, v18.8b}, [x0], x1 + b.hi 1b + ret +endfunc + +function ff_hevc_put_hevc_qpel_uni_w_h32_8_neon, export=1 + QPEL_UNI_W_H_HEADER 8h + ldr w10, [sp, #16] // width + ld1 {v1.8b}, [x2], #8 + sub x3, x3, w10, uxtw // decrement src stride + mov w11, w10 // original width + sub x3, x3, #8 // decrement src stride + sub x1, x1, w10, uxtw // decrement dst stride + sxtl v0.8h, v28.8b + uxtl v1.8h, v1.8b +1: + ld1 {v2.8b, v3.8b}, [x2], #16 + subs w10, w10, #16 // width + uxtl v2.8h, v2.8b + uxtl v3.8h, v3.8b + ext v4.16b, v1.16b, v2.16b, #2 + ext v5.16b, v1.16b, v2.16b, #4 + ext v6.16b, v1.16b, v2.16b, #6 + ext v7.16b, v1.16b, v2.16b, #8 + ext v16.16b, v1.16b, v2.16b, #10 + ext v17.16b, v1.16b, v2.16b, #12 + ext v18.16b, v1.16b, v2.16b, #14 + mul v19.8h, v1.8h, v0.h[0] + mla v19.8h, v4.8h, v0.h[1] + mla v19.8h, v5.8h, v0.h[2] + mla v19.8h, v6.8h, v0.h[3] + mla v19.8h, v7.8h, v0.h[4] + mla v19.8h, v16.8h, v0.h[5] + mla v19.8h, v17.8h, v0.h[6] + mla v19.8h, v18.8h, v0.h[7] + ext v4.16b, v2.16b, v3.16b, #2 + ext v5.16b, v2.16b, v3.16b, #4 + ext v6.16b, v2.16b, v3.16b, #6 + ext v7.16b, v2.16b, v3.16b, #8 + ext v16.16b, v2.16b, v3.16b, #10 + ext v17.16b, v2.16b, v3.16b, #12 + ext v18.16b, v2.16b, v3.16b, #14 + mul v20.8h, v2.8h, v0.h[0] + mla v20.8h, v4.8h, v0.h[1] + mla v20.8h, v5.8h, v0.h[2] + mla v20.8h, v6.8h, v0.h[3] + mla v20.8h, v7.8h, v0.h[4] + mla v20.8h, v16.8h, v0.h[5] + mla v20.8h, v17.8h, v0.h[6] + mla v20.8h, v18.8h, v0.h[7] + smull v16.4s, v19.4h, v30.4h + smull2 v17.4s, v19.8h, v30.8h + smull v18.4s, v20.4h, v30.4h + smull2 v19.4s, v20.8h, v30.8h + sqrshl v16.4s, v16.4s, v31.4s + sqrshl v17.4s, v17.4s, v31.4s + sqrshl v18.4s, v18.4s, v31.4s + sqrshl v19.4s, v19.4s, v31.4s + sqadd v16.4s, v16.4s, v29.4s + sqadd v17.4s, v17.4s, v29.4s + sqadd v18.4s, v18.4s, v29.4s + sqadd v19.4s, v19.4s, v29.4s + sqxtn v16.4h, v16.4s + sqxtn2 v16.8h, v17.4s + sqxtn v17.4h, v18.4s + sqxtn2 v17.8h, v19.4s + sqxtun v16.8b, v16.8h + sqxtun v17.8b, v17.8h + st1 {v16.8b, v17.8b}, [x0], #16 + mov v1.16b, v3.16b + b.gt 1b + subs w4, w4, #1 // height + add x2, x2, x3 + b.le 9f + ld1 {v1.8b}, [x2], #8 + mov w10, w11 + add x0, x0, x1 + uxtl v1.8h, v1.8b + b 1b +9: + ret +endfunc + +#if HAVE_I8MM +ENABLE_I8MM function ff_hevc_put_hevc_qpel_uni_w_h4_8_neon_i8mm, export=1 QPEL_UNI_W_H_HEADER 1:

[FFmpeg-devel,14/21] aarch64: hevc: Implement a neon version of hevc_qpel_uni_w_h*_8

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