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[FFmpeg-devel] lavc/vc1dsp: match C block layout in inv_trans_4x4_rvv

Message ID 20240610190306.23569-1-remi@remlab.net
State New
Headers show
Series [FFmpeg-devel] lavc/vc1dsp: match C block layout in inv_trans_4x4_rvv | expand

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Context Check Description
andriy/make_x86 success Make finished
andriy/make_fate_x86 success Make fate finished

Commit Message

Rémi Denis-Courmont June 10, 2024, 7:03 p.m. UTC 
Although checkasm does not verify this, the decoder requires that the
transform updates the input block exactly like the C code does.

This fixes vc1-ism, vc1_ilaced_twomv, vc1_sa00040, vc1_sa10091,
vc1_sa10143, vc1_sa20021, vc1test_smm0005 and wmv3-drm-dec tests.
---
 libavcodec/riscv/vc1dsp_rvv.S | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
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Patch

diff --git a/libavcodec/riscv/vc1dsp_rvv.S b/libavcodec/riscv/vc1dsp_rvv.S
index ab10027ae5..c4517d54f5 100644
--- a/libavcodec/riscv/vc1dsp_rvv.S
+++ b/libavcodec/riscv/vc1dsp_rvv.S
@@ -380,12 +380,12 @@  func ff_vc1_inv_trans_4x4_rvv, zve32x
         vlsseg4e16.v v0, (a2), a3
         li           t1, 3
         jal          t0, ff_vc1_inv_trans_4_rvv
-        vsseg4e16.v  v0, (a2)
-        addi         t1, a2, 1 * 4 * 2
+        vssseg4e16.v v0, (a2), a3
+        addi         t1, a2, 2 * 4 * 2
         vle16.v      v0, (a2)
-        addi         t2, a2, 2 * 4 * 2
+        addi         t2, a2, 4 * 4 * 2
         vle16.v      v1, (t1)
-        addi         t3, a2, 3 * 4 * 2
+        addi         t3, a2, 6 * 4 * 2
         vle16.v      v2, (t2)
         vle16.v      v3, (t3)
         li           t1, 7