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[FFmpeg-devel,1/2] lavc/h264dsp: avoid \+ expansion

Message ID 20240710205225.50112-1-remi@remlab.net
State New
Headers show
Series [FFmpeg-devel,1/2] lavc/h264dsp: avoid \+ expansion | expand

Checks

Context Check Description
andriy/make_x86 success Make finished
andriy/make_fate_x86 success Make fate finished

Commit Message

Rémi Denis-Courmont July 10, 2024, 8:52 p.m. UTC
This seems to be unsupported by LLVM-as.
---
 libavcodec/riscv/h264idct_rvv.S | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/libavcodec/riscv/h264idct_rvv.S b/libavcodec/riscv/h264idct_rvv.S
index 741e7a5532..6f17df66cc 100644
--- a/libavcodec/riscv/h264idct_rvv.S
+++ b/libavcodec/riscv/h264idct_rvv.S
@@ -68,8 +68,10 @@  func ff_h264_idct_add_8_rvv, zve32x
         vse16.v     v2, (t2)
         vse16.v     v3, (t3)
         vlseg4e16.v v0, (a1)
+        .equ    offset, 0
         .rept   256 / __riscv_xlen
-        sx      zero, ((__riscv_xlen / 8) * \+)(a1)
+        sx      zero, offset(a1)
+        .equ    offset, offset + (__riscv_xlen / 8)
         .endr
         jal         t0, ff_h264_idct4_rvv
         add         t1, a0, a2
@@ -179,8 +181,10 @@  func ff_h264_idct8_add_8_rvv, zve32x
         vse16.v     v6, (t6)
         vse16.v     v7, (a7)
         vlseg8e16.v v0, (a1)
+        .equ    offset, 0
         .rept   1024 / __riscv_xlen
-        sx      zero, ((__riscv_xlen / 8) * \+)(a1)
+        sx      zero, offset(a1)
+        .equ    offset, offset + (__riscv_xlen / 8)
         .endr
         jal         t0, ff_h264_idct8_rvv
         add         t1, a0, a2