diff mbox series

[FFmpeg-devel,v2,9/9] lavc/vp9dsp: R-V V mc tap hv

Message ID tencent_128545F054AACA58600D09149BCF9D62F90A@qq.com
State New
Headers show
Series [FFmpeg-devel,v2,1/9] lavc/vp9dsp: R-V ipred vert | expand

Checks

Context Check Description
andriy/make_x86 success Make finished
andriy/make_fate_x86 success Make fate finished

Commit Message

uk7b@foxmail.com May 7, 2024, 7:36 a.m. UTC 
From: sunyuechi <sunyuechi@iscas.ac.cn>

C908:
vp9_avg_8tap_smooth_4hv_8bpp_c: 32.0
vp9_avg_8tap_smooth_4hv_8bpp_rvv_i64: 15.0
vp9_avg_8tap_smooth_8hv_8bpp_c: 114.5
vp9_avg_8tap_smooth_8hv_8bpp_rvv_i64: 40.5
vp9_avg_8tap_smooth_16hv_8bpp_c: 338.7
vp9_avg_8tap_smooth_16hv_8bpp_rvv_i64: 46.5
vp9_avg_8tap_smooth_32hv_8bpp_c: 1270.7
vp9_avg_8tap_smooth_32hv_8bpp_rvv_i64: 134.0
vp9_avg_8tap_smooth_64hv_8bpp_c: 4923.5
vp9_avg_8tap_smooth_64hv_8bpp_rvv_i64: 523.5
vp9_put_8tap_smooth_4hv_8bpp_c: 30.5
vp9_put_8tap_smooth_4hv_8bpp_rvv_i64: 14.2
vp9_put_8tap_smooth_8hv_8bpp_c: 91.7
vp9_put_8tap_smooth_8hv_8bpp_rvv_i64: 22.7
vp9_put_8tap_smooth_16hv_8bpp_c: 328.7
vp9_put_8tap_smooth_16hv_8bpp_rvv_i64: 45.0
vp9_put_8tap_smooth_32hv_8bpp_c: 1166.7
vp9_put_8tap_smooth_32hv_8bpp_rvv_i64: 131.0
vp9_put_8tap_smooth_64hv_8bpp_c: 4532.5
vp9_put_8tap_smooth_64hv_8bpp_rvv_i64: 512.5
---
 libavcodec/riscv/vp9_mc_rvv.S  | 94 ++++++++++++++++++++++++++++++++++
 libavcodec/riscv/vp9dsp_init.c |  3 +-
 2 files changed, 96 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/libavcodec/riscv/vp9_mc_rvv.S b/libavcodec/riscv/vp9_mc_rvv.S
index 01404bbde5..0dcec94bbf 100644
--- a/libavcodec/riscv/vp9_mc_rvv.S
+++ b/libavcodec/riscv/vp9_mc_rvv.S
@@ -358,6 +358,99 @@  func ff_\op\()_8tap_\name\()_\len\()\type\()_rvv, zve32x
 endfunc
 .endm
 
+.macro epel_hv_once len name op
+        sub             a2, a2, a3
+        sub             a2, a2, a3
+        sub             a2, a2, a3
+        .irp n 0 2 4 6 8 10 12 14
+        epel_load_inc   v\n \len put \name h 1 t
+        .endr
+        addi            a4, a4, -1
+1:
+        addi            a4, a4, -1
+        epel_load       v30 \len \op \name v 0 s
+        vse8.v          v30, (a0)
+        vmv.v.v         v0, v2
+        vmv.v.v         v2, v4
+        vmv.v.v         v4, v6
+        vmv.v.v         v6, v8
+        vmv.v.v         v8, v10
+        vmv.v.v         v10, v12
+        vmv.v.v         v12, v14
+        epel_load       v14 \len put \name h 1 t
+        add             a2, a2, a3
+        add             a0, a0, a1
+        bnez            a4, 1b
+        epel_load       v30 \len \op \name v 0 s
+        vse8.v          v30, (a0)
+.endm
+
+.macro epel_hv op name len
+func ff_\op\()_8tap_\name\()_\len\()hv_rvv, zve32x
+#if __riscv_xlen == 64
+        addi            sp, sp, -64
+        .irp n 0,1,2,3,4,5,6,7
+        sd              s\n, \n\()<<3(sp)
+        .endr
+#else
+        addi            sp, sp, -32
+        .irp n 0,1,2,3,4,5,6,7
+        sw              s\n, \n\()<<2(sp)
+        .endr
+#endif
+.ifc \len,64
+#if __riscv_xlen == 64
+        addi            sp, sp, -48
+        .irp n 0,1,2,3,4,5
+        sd              a\n, \n\()<<3(sp)
+        .endr
+#else
+        addi            sp, sp, -24
+        .irp n 0,1,2,3,4,5
+        sw              a\n, \n\()<<2(sp)
+        .endr
+#endif
+.endif
+.ifc \op,avg
+        csrwi           vxrm, 0
+.endif
+        epel_filter     \name h t
+        epel_filter     \name v s
+        vsetvlstatic8   \len a6 m2
+        epel_hv_once    \len \name \op
+.ifc \len,64
+#if __riscv_xlen == 64
+        .irp n 0,1,2,3,4,5
+        ld              a\n, \n\()<<3(sp)
+        .endr
+        addi            sp, sp, 48
+#else
+        .irp n 0,1,2,3,4,5
+        lw              a\n, \n\()<<2(sp)
+        .endr
+        addi            sp, sp, 24
+#endif
+        addi            a0, a0, 32
+        addi            a2, a2, 32
+        epel_filter     \name h t
+        epel_hv_once    \len \name \op
+.endif
+#if __riscv_xlen == 64
+        .irp n 0,1,2,3,4,5,6,7
+        ld              s\n, \n\()<<3(sp)
+        .endr
+        addi            sp, sp, 64
+#else
+        .irp n 0,1,2,3,4,5,6,7
+        lw              s\n, \n\()<<2(sp)
+        .endr
+        addi            sp, sp, 32
+#endif
+
+        ret
+endfunc
+.endm
+
 .irp len 64, 32, 16, 8, 4
         copy_avg \len
         .irp op put avg
@@ -368,6 +461,7 @@  endfunc
                         .irp type h v
                                 epel \len \op \name \type
                         .endr
+                        epel_hv \op \name \len
                 .endr
         .endr
 .endr
diff --git a/libavcodec/riscv/vp9dsp_init.c b/libavcodec/riscv/vp9dsp_init.c
index a45aea530d..554fcefa6e 100644
--- a/libavcodec/riscv/vp9dsp_init.c
+++ b/libavcodec/riscv/vp9dsp_init.c
@@ -131,7 +131,8 @@  static av_cold void vp9dsp_mc_init_riscv(VP9DSPContext *dsp, int bpp)
     init_subpel2(idx, 1, 0, h, type);   \
     if (flags & AV_CPU_FLAG_RVB_ADDR) { \
     init_subpel2(idx, 0, 1, v, type);   \
-    }
+    }                                   \
+    init_subpel2(idx, 1, 1, hv, type)
 
     init_subpel3(0, put);
     init_subpel3(1, avg);