Message ID | tencent_D0D6B0539E1E55700BF821F462ADB9762C07@qq.com |
---|---|
State | New |
Headers | show |
Series | [FFmpeg-devel,v3,1/5] lavc/vp9dsp: R-V V rename ff_avg to ff_vp9_avg | expand |
Context | Check | Description |
---|---|---|
yinshiyou/make_loongarch64 | success | Make finished |
yinshiyou/make_fate_loongarch64 | success | Make fate finished |
andriy/make_x86 | success | Make finished |
andriy/make_fate_x86 | success | Make fate finished |
Le keskiviikkona 29. toukokuuta 2024, 20.15.38 EEST uk7b@foxmail.com a écrit : > From: sunyuechi <sunyuechi@iscas.ac.cn> > > C908: > vp9_avg_bilin_4hv_8bpp_c: 11.0 > vp9_avg_bilin_4hv_8bpp_rvv_i64: 3.7 > vp9_avg_bilin_8hv_8bpp_c: 38.7 > vp9_avg_bilin_8hv_8bpp_rvv_i64: 7.2 > vp9_avg_bilin_16hv_8bpp_c: 147.0 > vp9_avg_bilin_16hv_8bpp_rvv_i64: 14.2 > vp9_avg_bilin_32hv_8bpp_c: 574.5 > vp9_avg_bilin_32hv_8bpp_rvv_i64: 42.7 > vp9_avg_bilin_64hv_8bpp_c: 2311.5 > vp9_avg_bilin_64hv_8bpp_rvv_i64: 201.7 > vp9_put_bilin_4hv_8bpp_c: 10.0 > vp9_put_bilin_4hv_8bpp_rvv_i64: 3.2 > vp9_put_bilin_8hv_8bpp_c: 35.2 > vp9_put_bilin_8hv_8bpp_rvv_i64: 6.5 > vp9_put_bilin_16hv_8bpp_c: 133.7 > vp9_put_bilin_16hv_8bpp_rvv_i64: 13.0 > vp9_put_bilin_32hv_8bpp_c: 538.2 > vp9_put_bilin_32hv_8bpp_rvv_i64: 39.7 > vp9_put_bilin_64hv_8bpp_c: 2114.0 > vp9_put_bilin_64hv_8bpp_rvv_i64: 153.7 > --- > libavcodec/riscv/vp9_mc_rvv.S | 38 +++++++++++++++++++++++++++++++++- > libavcodec/riscv/vp9dsp_init.c | 10 +++++++++ > 2 files changed, 47 insertions(+), 1 deletion(-) > > diff --git a/libavcodec/riscv/vp9_mc_rvv.S b/libavcodec/riscv/vp9_mc_rvv.S > index 9611aba0ed..990271736b 100644 > --- a/libavcodec/riscv/vp9_mc_rvv.S > +++ b/libavcodec/riscv/vp9_mc_rvv.S > @@ -93,6 +93,40 @@ func ff_\op\()_vp9_bilin_4\type\()_rvv, zve32x > endfunc > .endm > > +.macro bilin_hv op > +func ff_\op\()_vp9_bilin_4hv_rvv, zve32x > + vsetvlstatic8 4, t0, 64 > +.Lbilin_hv\op: > +.ifc \op,avg > + csrwi vxrm, 0 > +.endif > + neg t1, a5 > + neg t2, a6 > + li t4, 8 > + bilin_load v24, put, h, a5 > + add a2, a2, a3 > +1: > + addi a4, a4, -1 > + bilin_load v4, put, h, a5 > + vwmulu.vx v16, v4, a6 > + vwmaccsu.vx v16, t2, v24 > + vwadd.wx v16, v16, t4 > + vnsra.wi v16, v16, 4 > + vadd.vv v0, v16, v24 > +.ifc \op,avg > + vle8.v v16, (a0) > + vaaddu.vv v0, v0, v16 > +.endif > + vse8.v v0, (a0) > + vmv.v.v v24, v4 Copying vectors is rarely justified - mostly only before destructive instructions such as FMA. If a4 is even (?), this should be faster by unrolling to two rows per iteration. > + add a2, a2, a3 > + add a0, a0, a1 > + bnez a4, 1b > + > + ret > +endfunc > +.endm > + > .irp len, 64, 32, 16, 8, 4 > copy_avg \len > .endr > @@ -101,6 +135,8 @@ bilin_h_v put, h, a5 > bilin_h_v avg, h, a5 > bilin_h_v put, v, a6 > bilin_h_v avg, v, a6 > +bilin_hv put > +bilin_hv avg > > .macro func_bilin_h_v len, op, type > func ff_\op\()_vp9_bilin_\len\()\type\()_rvv, zve32x > @@ -111,7 +147,7 @@ endfunc > > .irp len, 64, 32, 16, 8 > .irp op, put, avg > - .irp type, h, v > + .irp type, h, v, hv > func_bilin_h_v \len, \op, \type > .endr > .endr > diff --git a/libavcodec/riscv/vp9dsp_init.c b/libavcodec/riscv/vp9dsp_init.c > index 9606d8545f..b3700dfb08 100644 > --- a/libavcodec/riscv/vp9dsp_init.c > +++ b/libavcodec/riscv/vp9dsp_init.c > @@ -83,6 +83,16 @@ static av_cold void vp9dsp_mc_init_riscv(VP9DSPContext > *dsp, int bpp) dsp->mc[4][FILTER_BILINEAR ][0][1][0] = > ff_put_vp9_bilin_4h_rvv; dsp->mc[4][FILTER_BILINEAR ][1][0][1] = > ff_avg_vp9_bilin_4v_rvv; dsp->mc[4][FILTER_BILINEAR ][1][1][0] = > ff_avg_vp9_bilin_4h_rvv; + dsp->mc[0][FILTER_BILINEAR ][0][1][1] = > ff_put_vp9_bilin_64hv_rvv; + dsp->mc[0][FILTER_BILINEAR ][1][1][1] = > ff_avg_vp9_bilin_64hv_rvv; + dsp->mc[1][FILTER_BILINEAR ][0][1][1] = > ff_put_vp9_bilin_32hv_rvv; + dsp->mc[1][FILTER_BILINEAR ][1][1][1] = > ff_avg_vp9_bilin_32hv_rvv; + dsp->mc[2][FILTER_BILINEAR ][0][1][1] = > ff_put_vp9_bilin_16hv_rvv; + dsp->mc[2][FILTER_BILINEAR ][1][1][1] = > ff_avg_vp9_bilin_16hv_rvv; + dsp->mc[3][FILTER_BILINEAR ][0][1][1] = > ff_put_vp9_bilin_8hv_rvv; + dsp->mc[3][FILTER_BILINEAR ][1][1][1] = > ff_avg_vp9_bilin_8hv_rvv; + dsp->mc[4][FILTER_BILINEAR ][0][1][1] = > ff_put_vp9_bilin_4hv_rvv; + dsp->mc[4][FILTER_BILINEAR ][1][1][1] = > ff_avg_vp9_bilin_4hv_rvv; > > #undef init_fpel > }
diff --git a/libavcodec/riscv/vp9_mc_rvv.S b/libavcodec/riscv/vp9_mc_rvv.S index 9611aba0ed..990271736b 100644 --- a/libavcodec/riscv/vp9_mc_rvv.S +++ b/libavcodec/riscv/vp9_mc_rvv.S @@ -93,6 +93,40 @@ func ff_\op\()_vp9_bilin_4\type\()_rvv, zve32x endfunc .endm +.macro bilin_hv op +func ff_\op\()_vp9_bilin_4hv_rvv, zve32x + vsetvlstatic8 4, t0, 64 +.Lbilin_hv\op: +.ifc \op,avg + csrwi vxrm, 0 +.endif + neg t1, a5 + neg t2, a6 + li t4, 8 + bilin_load v24, put, h, a5 + add a2, a2, a3 +1: + addi a4, a4, -1 + bilin_load v4, put, h, a5 + vwmulu.vx v16, v4, a6 + vwmaccsu.vx v16, t2, v24 + vwadd.wx v16, v16, t4 + vnsra.wi v16, v16, 4 + vadd.vv v0, v16, v24 +.ifc \op,avg + vle8.v v16, (a0) + vaaddu.vv v0, v0, v16 +.endif + vse8.v v0, (a0) + vmv.v.v v24, v4 + add a2, a2, a3 + add a0, a0, a1 + bnez a4, 1b + + ret +endfunc +.endm + .irp len, 64, 32, 16, 8, 4 copy_avg \len .endr @@ -101,6 +135,8 @@ bilin_h_v put, h, a5 bilin_h_v avg, h, a5 bilin_h_v put, v, a6 bilin_h_v avg, v, a6 +bilin_hv put +bilin_hv avg .macro func_bilin_h_v len, op, type func ff_\op\()_vp9_bilin_\len\()\type\()_rvv, zve32x @@ -111,7 +147,7 @@ endfunc .irp len, 64, 32, 16, 8 .irp op, put, avg - .irp type, h, v + .irp type, h, v, hv func_bilin_h_v \len, \op, \type .endr .endr diff --git a/libavcodec/riscv/vp9dsp_init.c b/libavcodec/riscv/vp9dsp_init.c index 9606d8545f..b3700dfb08 100644 --- a/libavcodec/riscv/vp9dsp_init.c +++ b/libavcodec/riscv/vp9dsp_init.c @@ -83,6 +83,16 @@ static av_cold void vp9dsp_mc_init_riscv(VP9DSPContext *dsp, int bpp) dsp->mc[4][FILTER_BILINEAR ][0][1][0] = ff_put_vp9_bilin_4h_rvv; dsp->mc[4][FILTER_BILINEAR ][1][0][1] = ff_avg_vp9_bilin_4v_rvv; dsp->mc[4][FILTER_BILINEAR ][1][1][0] = ff_avg_vp9_bilin_4h_rvv; + dsp->mc[0][FILTER_BILINEAR ][0][1][1] = ff_put_vp9_bilin_64hv_rvv; + dsp->mc[0][FILTER_BILINEAR ][1][1][1] = ff_avg_vp9_bilin_64hv_rvv; + dsp->mc[1][FILTER_BILINEAR ][0][1][1] = ff_put_vp9_bilin_32hv_rvv; + dsp->mc[1][FILTER_BILINEAR ][1][1][1] = ff_avg_vp9_bilin_32hv_rvv; + dsp->mc[2][FILTER_BILINEAR ][0][1][1] = ff_put_vp9_bilin_16hv_rvv; + dsp->mc[2][FILTER_BILINEAR ][1][1][1] = ff_avg_vp9_bilin_16hv_rvv; + dsp->mc[3][FILTER_BILINEAR ][0][1][1] = ff_put_vp9_bilin_8hv_rvv; + dsp->mc[3][FILTER_BILINEAR ][1][1][1] = ff_avg_vp9_bilin_8hv_rvv; + dsp->mc[4][FILTER_BILINEAR ][0][1][1] = ff_put_vp9_bilin_4hv_rvv; + dsp->mc[4][FILTER_BILINEAR ][1][1][1] = ff_avg_vp9_bilin_4hv_rvv; #undef init_fpel }
From: sunyuechi <sunyuechi@iscas.ac.cn> C908: vp9_avg_bilin_4hv_8bpp_c: 11.0 vp9_avg_bilin_4hv_8bpp_rvv_i64: 3.7 vp9_avg_bilin_8hv_8bpp_c: 38.7 vp9_avg_bilin_8hv_8bpp_rvv_i64: 7.2 vp9_avg_bilin_16hv_8bpp_c: 147.0 vp9_avg_bilin_16hv_8bpp_rvv_i64: 14.2 vp9_avg_bilin_32hv_8bpp_c: 574.5 vp9_avg_bilin_32hv_8bpp_rvv_i64: 42.7 vp9_avg_bilin_64hv_8bpp_c: 2311.5 vp9_avg_bilin_64hv_8bpp_rvv_i64: 201.7 vp9_put_bilin_4hv_8bpp_c: 10.0 vp9_put_bilin_4hv_8bpp_rvv_i64: 3.2 vp9_put_bilin_8hv_8bpp_c: 35.2 vp9_put_bilin_8hv_8bpp_rvv_i64: 6.5 vp9_put_bilin_16hv_8bpp_c: 133.7 vp9_put_bilin_16hv_8bpp_rvv_i64: 13.0 vp9_put_bilin_32hv_8bpp_c: 538.2 vp9_put_bilin_32hv_8bpp_rvv_i64: 39.7 vp9_put_bilin_64hv_8bpp_c: 2114.0 vp9_put_bilin_64hv_8bpp_rvv_i64: 153.7 --- libavcodec/riscv/vp9_mc_rvv.S | 38 +++++++++++++++++++++++++++++++++- libavcodec/riscv/vp9dsp_init.c | 10 +++++++++ 2 files changed, 47 insertions(+), 1 deletion(-)